PD - 95708D IRFB3207PbF IRFS3207PbF IRFSL3207PbF Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits HEXFET(R) Power MOSFET D G Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free S VDSS RDS(on) typ. max. ID S D G S D G S D G D2Pak IRFS3207PbF TO-220AB IRFB3207PbF 75V 3.6m: 4.5m: 170A TO-262 IRFSL3207PbF Absolute Maximum Ratings Symbol ID @ TC = 25C Parameter Max. ID @ TC = 100C Continuous Drain Current, VGS @ 10V IDM Pulsed Drain Current PD @TC = 25C Maximum Power Dissipation 170 d 300 W W/C V Linear Derating Factor 2.0 Gate-to-Source Voltage 20 dV/dt TJ Operating Junction and TSTG Storage Temperature Range f 5.8 V/ns C -55 to + 175 300 Soldering Temperature, for 10 seconds (1.6mm from case) x Avalanche Characteristics EAS (Thermally limited) Single Pulse Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy x 10lb in (1.1N m) Mounting torque, 6-32 or M3 screw c A 720 VGS Peak Diode Recovery Units c 120c Continuous Drain Current, VGS @ 10V e g 910 mJ See Fig. 14, 15, 16a, 16b, A mJ Thermal Resistance Symbol Parameter RJC Junction-to-Case k Typ. Max. --- 0.50 RCS Case-to-Sink, Flat Greased Surface , TO-220 0.50 --- RJA Junction-to-Ambient, TO-220 --- 62 RJA Junction-to-Ambient (PCB Mount) , D2Pak --- 40 www.irf.com k jk Units C/W 1 03/06/06 IRF/B/S/SL3207PbF Static @ TJ = 25C (unless otherwise specified) Symbol Parameter V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) IDSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Gate Input Resistance RG Min. Typ. Max. Units 75 --- --- 2.0 --- --- --- --- --- --- --- 0.069 --- 3.6 4.5 --- 4.0 --- 20 --- 250 --- 200 --- -200 1.2 --- Conditions V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 1mA m VGS = 10V, ID = 75A V VDS = VGS, ID = 250A A VDS = 75V, VGS = 0V VDS = 75V, VGS = 0V, TJ = 125C nA VGS = 20V VGS = -20V f = 1MHz, open drain d g Dynamic @ TJ = 25C (unless otherwise specified) Symbol gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR) Parameter Min. Typ. Max. Units Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related) h i 150 --- --- --- --- --- --- --- --- --- --- --- --- --- 180 48 68 29 120 68 74 7600 710 390 920 1010 --- 260 --- --- --- --- --- --- --- --- --- --- --- S nC Conditions VDS = 50V, ID = 75A ID = 75A VDS = 60V VGS = 10V VDD = 48V ID = 75A RG = 2.6 VGS = 10V VGS = 0V VDS = 50V = 1.0MHz VGS = 0V, VDS = 0V to 60V VGS = 0V, VDS = 0V to 60V g ns g pF j, See Fig.11 h, See Fig. 5 Diode Characteristics Symbol Parameter Min. Typ. Max. Units IS Continuous Source Current --- --- 170 ISM (Body Diode) Pulsed Source Current --- --- VSD trr (Body Diode) Diode Forward Voltage Reverse Recovery Time Qrr Reverse Recovery Charge IRRM ton Reverse Recovery Current Forward Turn-On Time di Notes: Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A. Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25C, L = 0.33mH RG = 25, IAS = 75A, VGS =10V. Part not recommended for use above this value. ISD 75A, di/dt 500A/s, VDD V(BR)DSS, TJ 175C. Pulse width 400s; duty cycle 2%. 2 c 720 A Conditions MOSFET symbol showing the integral reverse D G p-n junction diode. TJ = 25C, IS = 75A, VGS = 0V TJ = 25C VR = 64V, TJ = 125C IF = 75A di/dt = 100A/s TJ = 25C TJ = 125C TJ = 25C S g --- --- 1.3 V --- 42 63 ns --- 49 74 --- 65 98 nC --- 92 140 --- 2.6 --- A Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) g Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. R is measured at TJ approximately 90C. www.irf.com IRF/B/S/SL3207PbF 1000 1000 VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V 100 BOTTOM 10 4.5V BOTTOM 100 4.5V 60s PULSE WIDTH Tj = 175C 60s PULSE WIDTH Tj = 25C 1 10 0.1 1 10 100 0.1 VDS, Drain-to-Source Voltage (V) 10 100 Fig 2. Typical Output Characteristics 2.5 RDS(on) , Drain-to-Source On Resistance (Normalized) 1000.0 ID, Drain-to-Source Current() 1 VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics TJ = 175C 100.0 TJ = 25C 10.0 VDS = 50V 60s PULSE WIDTH 1.0 4.0 5.0 6.0 7.0 8.0 ID = 75A VGS = 10V 2.0 1.5 1.0 0.5 9.0 -60 -40 -20 0 VGS, Gate-to-Source Voltage (V) 12000 VGS, Gate-to-Source Voltage (V) Coss = Cds + Cgd Ciss 8000 6000 4000 2000 Coss Crss 10 100 VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage www.irf.com ID= 75A VDS = 60V VDS= 38V 16 12 8 4 0 0 1 Fig 4. Normalized On-Resistance vs. Temperature 20 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd 10000 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature (C) Fig 3. Typical Transfer Characteristics C, Capacitance (pF) VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP 0 40 80 120 160 200 240 280 QG Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 IRF/B/S/SL3207PbF 10000 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000.0 TJ = 175C 100.0 10.0 TJ = 25C 1.0 OPERATION IN THIS AREA LIMITED BY R DS (on) 1000 100 100sec 10 1 VGS = 0V 1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 V(BR)DSS , Drain-to-Source Breakdown Voltage 200 Limited By Package ID, Drain Current (A) 150 100 50 0 50 75 100 125 150 100 1000 Fig 8. Maximum Safe Operating Area Fig 7. Typical Source-Drain Diode Forward Voltage 25 10 VDS , Drain-toSource Voltage (V) VSD, Source-to-Drain Voltage (V) 100 90 80 70 -60 -40 -20 0 175 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature (C) T C , Case Temperature (C) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage EAS, Single Pulse Avalanche Energy (mJ) 3.0 2.5 2.0 Energy (J) 10msec DC 0.1 0.1 1.5 1.0 0.5 4000 I D 12A 16A BOTTOM 75A TOP 3000 2000 1000 0 0.0 20 30 40 50 60 70 VDS, Drain-to-Source Voltage (V) Fig 11. Typical COSS Stored Energy 4 1msec Tc = 25C Tj = 175C Single Pulse 80 25 50 75 100 125 150 175 Starting TJ, Junction Temperature (C) Fig 12. Maximum Avalanche Energy Vs. DrainCurrent www.irf.com IRF/B/S/SL3207PbF 1 Thermal Response ( ZthJC ) D = 0.50 0.1 0.20 0.10 0.05 0.01 J 0.02 0.01 R1 R1 J 1 R2 R2 C 2 1 Ri (C/W) i (sec) 0.2151 0.001175 0.2350 2 0.017994 Ci= i/Ri Ci= i/Ri 0.001 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc SINGLE PULSE ( THERMAL RESPONSE ) 0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 100 Avalanche Current (A) Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse) 0.01 0.05 10 0.10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C. 1 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current vs.Pulsewidth EAR , Avalanche Energy (mJ) 1000 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as neither Tjmax nor Iav (max) is exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) TOP Single Pulse BOTTOM 1% Duty Cycle ID = 75A 800 600 400 200 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature (C) Fig 15. Maximum Avalanche Energy vs. Temperature www.irf.com PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav 5 IRF/B/S/SL3207PbF 16 ID = 1.0A ID = 1.0mA ID = 250A 4.5 4.0 14 12 IRRM - (A) VGS(th) Gate threshold Voltage (V) 5.0 3.5 3.0 10 8 2.5 6 IF = 30A VR = 64V 2.0 4 TJ = 125C TJ = 25C 1.5 2 -75 -50 -25 0 25 50 75 100 125 150 175 100 200 300 400 500 600 700 800 900 1000 TJ , Temperature ( C ) dif / dt - (A / s) Fig. 17 - Typical Recovery Current vs. dif/dt Fig 16. Threshold Voltage Vs. Temperature 16 400 14 300 QRR - (nC) IRRM - (A) 12 10 8 6 IF = 45A VR = 64V 4 TJ = 125C 200 IF = 30A VR = 64V 100 TJ = 125C TJ = 25C TJ = 25C 2 0 100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000 dif / dt - (A / s) dif / dt - (A / s) Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt 400 QRR - (nC) 300 200 100 IF = 45A VR = 64V TJ = 125C TJ = 25C 0 100 200 300 400 500 600 700 800 900 1000 dif / dt - (A / s) Fig. 20 - Typical Stored Charge vs. dif/dt 6 www.irf.com IRF/B/S/SL3207PbF D.U.T Driver Gate Drive + - - * D.U.T. ISD Waveform Reverse Recovery Current + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD P.W. Period VGS=10V Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer - D= Period P.W. + + - Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Current Inductor Curent ISD Ripple 5% * VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs V(BR)DSS 15V DRIVER L VDS tp D.U.T RG + V - DD IAS VGS 20V tp A 0.01 I AS Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms LD VDS VDS 90% + VDD - 10% D.U.T VGS VGS Pulse Width < 1s Duty Factor < 0.1% td(on) Fig 23a. Switching Time Test Circuit tr td(off) tf Fig 23b. Switching Time Waveforms Id Vds Vgs L VCC DUT 0 Vgs(th) 1K Qgs1 Qgs2 Fig 24a. Gate Charge Test Circuit www.irf.com Qgd Qgodr Fig 24b. Gate Charge Waveform 7 IRF/B/S/SL3207PbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) TO-220AB Part Marking Information (;$03/( 7+,6,6$1,5) /27&2'( $66(0%/('21:: ,17+($66(0%/