LTC2912 Single UV/OV Voltage Monitor FEATURES DESCRIPTION Monitors Single Voltage Adjustable UV and OV Trip Values Guaranteed Threshold Accuracy: 1.5% Power Supply Glitch Immunity Adjustable Reset Timeout with Timeout Disable 29A Quiescent Current Open-Drain OV and UV Outputs Guaranteed OV and UV for VCC 1V Available in 8-Lead ThinSOTTM and (3mm x 2mm) DFN Packages Three output configurations are available: the LTC29121 has a latch control for the OV output; the LTC2912-2 has an OV and UV output disable feature for margining applications; the LTC2912-3 is identical to the LTC2912-1 but with a noninverting, OV output. APPLICATIONS The LTC(R)2912 voltage monitor is designed to detect power supply undervoltage and overvoltage events. The VL and VH monitor inputs include filtering to reject brief glitches, thereby ensuring reliable reset operation without false or noisy triggering. An adjustable timer defines the duration of the overvoltage and undervoltage reset outputs which function independently. While the LTC2912 operates directly from 2.3V to 6V supplies, an internal VCC shunt regulator coupled with low supply current demand allows operation from higher voltages such as 12V, 24V or 48V. Desktop and Notebook Computers Network Servers Core, I/O Voltage Monitors The LTC2912 provides a precise, versatile, space-conscious micropower solution for voltage monitoring. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Single OV/UV Supply Monitor, 3.3V 10% Tolerance Reset Time-Out Period vs Capacitance 10000 3.3V 0.1F UV/OV TIMEOUT PERIOD, tUOTO (ms) POWER SUPPLY 1000 27.4k VCC VH OV SYSTEM LTC2912-1 1k VL UV 4.53k GND LATCH TMR 22nF 100 10 2912 TA01a TIMEOUT = 200ms 1 0.1 1 10 100 TMR PIN CAPACITANCE, CTMR (nF) 1000 2912 G08 2912fa 1 LTC2912 ABSOLUTE MAXIMUM RATINGS (Note 1) Terminal Voltages VCC (Note 3)............................................. -0.3V to 6V OV, UV, OV ............................................ -0.3V to 16V TMR ..........................................-0.3V to (VCC + 0.3V) VH, VL, LATCH, DIS .............................. -0.3V to 7.5V Terminal Currents IVCC ....................................................................10mA IUV, IOV, IOV ........................................................10mA Operating Temperature Range LTC2912C ................................................ 0C to 70C LTC2912I.............................................. -40C to 85C LTC2912H .......................................... -40C to 125C Storage Temperature Range TSOT.................................................. -65C to 125C DFN.................................................... -65C to 150C Lead Temperature (Soldering, 10 sec) TSOT................................................................. 300C PACKAGE/ORDER INFORMATION TOP VIEW TOP VIEW LATCH 1 UV 2 OV 3 GND 4 8 VCC 7 VH 6 VL 5 TMR TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 TJMAX = 150C, JA = 195C/W ORDER PART NUMBER LTC2912CTS8-1 LTC2912ITS8-1 LTC2912HTS8-1 TS8 PART MARKING* LTCJW LTCJW LTCJW 8 LATCH VCC 1 VH 2 VL 3 9 TMR 4 7 UV 6 OV 5 GND DDB PACKAGE 8-LEAD (3mm x 2mm) PLASTIC DFN TJMAX = 150C, JA = 76C/W EXPOSED PAD (PIN 9) IS GND, CONNECTION TO PCB OPTIONAL ORDER PART NUMBER LTC2912CDDB-1 LTC2912IDDB-1 LTC2912HDDB-1 DDB PART MARKING* LCJZ LCJZ LCJZ TOP VIEW TOP VIEW 8 VCC 7 VH 6 VL 5 TMR DIS 1 UV 2 OV 3 GND 4 TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 TJMAX = 150C, JA = 195C/W ORDER PART NUMBER LTC2912CTS8-2 LTC2912ITS8-2 LTC2912HTS8-2 TS8 PART MARKING* LTCJX LTCJX LTCJX VCC 1 VH 2 VL 3 8 DIS 9 TMR 4 7 UV 6 OV 5 GND DDB PACKAGE 8-LEAD (3mm x 2mm) PLASTIC DFN TJMAX = 150C, JA = 76C/W EXPOSED PAD (PIN 9) IS GND, CONNECTION TO PCB OPTIONAL ORDER PART NUMBER LTC2912CDDB-2 LTC2912IDDB-2 LTC2912HDDB-2 DDB PART MARKING* LCKB LCKB LCKB TOP VIEW TOP VIEW LATCH 1 UV 2 OV 3 GND 4 8 VCC 7 VH 6 VL 5 TMR TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 TJMAX = 150C, JA = 195C/W ORDER PART NUMBER LTC2912CTS8-3 LTC2912ITS8-3 LTC2912HTS8-3 TS8 PART MARKING* LTCJY LTCJY LTCJY 8 LATCH VCC 1 VH 2 VL 3 TMR 4 9 7 UV 6 OV 5 GND DDB PACKAGE 8-LEAD (3mm x 2mm) PLASTIC DFN TJMAX = 150C, JA = 76C/W EXPOSED PAD (PIN 9) IS GND, CONNECTION TO PCB OPTIONAL ORDER PART NUMBER LTC2912CDDB-3 LTC2912IDDB-3 LTC2912HDDB-3 DDB PART MARKING* LCKC LCKC LCKC Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ *The temperature grade is identified by a label on the shipping container. 2 2912fa LTC2912 ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 3.3V, VL = 0.45V, VH = 0.55V, LATCH = VCC unless otherwise noted. (Note 2) SYMBOL VSHUNT VSHUNT PARAMETER VCC Shunt Regulator Voltage VCC Shunt Regulator Load Regulation CONDITIONS MIN TYP MAX ICC = 5mA 6.2 6.6 7.2 V -40C < TA < 125 6.2 6.6 7.3 V ICC = 2mA to 10mA 200 300 mV VCC Supply Voltage (Note 3) VCCR(MIN) Minimum VCC Output Valid DIS = 0V VCC(UVLO) Supply Undervoltage Lockout DIS = 0V, VCC Rising 1.9 VCC(UVHYST) Supply Undervoltage Lockout Hysteresis DIS = 0V 5 ICC Supply Current VCC = 2.3V to 6V VUOT Undervoltage/Overvoltage Threshold tUOD Undervoltage/Overvoltage Threshold to Output Delay IVHL VH, VL Input Current tUOTO UV/OV Time-Out Period 2.3 UNITS VSHUNT V 1 V 2 2.1 V 25 50 mV 29 70 A 492 500 508 mV 50 125 500 s 15 nA -40C < TA < 125 30 nA CTMR = 1nF 6 8.5 12.5 ms -40C < TA < 125 6 8.5 14 ms 1.2 VHn = VUOT - 5mV or VLn = VUOT + 5mV VLATCH(VIH) OV Latch Clear Input High VLATCH(VIL) OV Latch Clear Input Low ILATCH LATCH Input Current VLATCH > 0.5V IDIS DIS Input Current VDIS > 0.5V 1 VDIS(VIH) DIS Input High 1.2 VDIS(VIL) DIS Input Low ITMR(UP) TMR Pull-Up Current V 2 0.8 V 1 A 3.3 A V 0.8 V VTMR = 0V -1.3 -2.1 -2.8 A -40C < TA < 125 -1.2 -2.1 -2.8 A VTMR = 1.6V 1.3 2.1 2.8 A 2.8 ITMR(DOWN) TMR Pull-Down Current -40C < TA < 125 1.2 2.1 VTMR(DIS) Timer Disable Voltage Referenced to VCC -180 -270 VOH Output Voltage High UV/OV/OV VCC = 2.3V, IUV/OV = -1A 1 VOL Output Voltage Low UV/OV/OV VCC = 2.3V, IUV/OV = 2.5mA VCC = 1V, IUV = 100A Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into pins are positive; all voltages are referenced to GND unless otherwise noted. A mV V 0.10 0.01 0.30 0.15 V V Note 3: VCC maximum pin voltage is limited by input current. Since the VCC pin has an internal 6.5V shunt regulator, a low impedance supply that exceeds 6V may exceed the rated terminal current. Operation from higher voltage supplies requires a series dropping resistor. See Applications Information. 2912fa 3 LTC2912 TIMING DIAGRAMS VL Monitor Timing VH Monitor Timing VUOT VH tUOD UV VUOT VL tUOD tUOTO OV 1V tUOTO 1V 2912 TD02 2912 TD01 VH Monitor Timing (TMR Pin Strapped to VCC) VL Monitor Timing (TMR Pin Strapped to VCC) VUOT VH tUOD UV VUOT VL tUOD tUOD OV 1V tUOD 1V 2912 TD03 2912 TD04 TYPICAL PERFORMANCE CHARACTERISTICS Input Threshold Voltage vs Temperature VCC Shunt Voltage vs Temperature Supply Current vs Temperature 0.505 6.8 45 40 0.503 6.7 10mA 6.6 5mA 6.5 2mA VCC = 5V 0.502 0.500 0.499 VCC (V) 35 0.501 ICC (A) THRESHOLD VOLTAGE, VUOT (V) 0.504 VCC = 3.3V 30 6.4 25 0.498 VCC = 2.3V 0.497 1mA 20 6.3 15 -50 6.2 -50 200A 0.496 0.495 -50 -25 25 50 0 TEMPERATURE (C) 75 100 -25 0 25 50 TEMPERATURE (C) 75 2912 G01 6.75 -40C 25C 6.25 -2 0 2 600 400 300 200 VCC 0.6 RESET OCCURS ABOVE CURVE 500 0.4 UV WITH 10k PULL-UP 0.2 VCC = 6V UV WITHOUT PULL-UP 100 VCC = 2.3V 85C 6 4 ICC (mA) 8 10 12 2912 G04 100 UV Output Voltage vs VCC UV VOLTAGE (V) TYPICAL TRANSIENT DURATION (s) VCC (V) 6.45 75 0.8 700 6.55 0 25 50 TEMPERATURE (C) 2912 G03 Typical Transient Duration vs Comparator Overdrive 6.65 -25 2912 G02 VCC Shunt Voltage vs ICC 6.35 100 50 0.1 1 10 100 COMPARATOR OVERDRIVE PAST THRESHOLD (%) 2912 G05 0 0 0.2 0.6 0.8 0.4 SUPPLY VOLTAGE, VCC (V) 1 2912 G06 2912fa 4 LTC2912 TYPICAL PERFORMANCE CHARACTERISTICS Reset Time-Out Period vs Capacitance UV Output Voltage vs VCC UV/OV TIMEOUT PERIOD, tUOTO (ms) VH = 0.55V SEL = VCC UV VOLTAGE (V) 4 1000 3 2 1 0 UV, ISINK vs VCC 5 10000 PULL-DOWN CURRENT, IUV (mA) 5 0 1 3 4 2 SUPPLY VOLTAGE, VCC (V) 100 10 1 0.1 5 UV/OV, Voltage Output Low vs Output Sink Current 12 UV/OV TIMEOUT PERIOD, tOUTO (ms) 25C UV/OV, VOL (V) 0.8 -40C 0.6 0.4 0.2 0 5 10 15 20 IUV/OV (mA) 25 30 1912 G10 PIN FUNCTIONS 2 UV AT 50mV 1 1000 0 1 3 4 2 SUPPLY VOLTAGE, VCC (V) 5 2912 G09 Reset Timeout Period vs Temperature 1.0 0 UV AT 150mV 3 2912 G08 2912 G07 85C 4 0 1 10 100 TMR PIN CAPACITANCE, CTMR (nF) VH = 0.45V SEL = VCC CTMR = 1nF 11 10 9 8 7 6 -50 -25 0 25 50 TEMPERATURE (C) 75 100 2912 G11 (DFN/TSOT Packages) DIS (Pin 8/Pin 1, LTC2912-2): Output Disable Input. Disables the OV and UV output pins. When DIS is pulled high, the OV and UV pins are not asserted except during a UVLO condition. Pin has a weak (2A) internal pull-down to GND. Leave pin open if unused. Exposed Pad (Pin 9, DDB Package): Exposed Pad may be left open or connected to device ground. GND (Pin 5/Pin 4): Device Ground. is cleared. While held high, OV/OV has a similar delay and output characteristic as UV. OV (Pin 6/Pin 3, LTC2912-1, LTC2912-2): Overvoltage Logic Output. Asserts low when the VL input voltage is above threshold. Latched low (LTC2912-1). Held low for programmed delay time after VL input is valid (LTC2912-2). Pin has a weak pull-up to VCC and may be pulled above VCC using an external pull-up. Leave pin open if unused. LATCH (Pin 8/Pin 1, LTC2912-1, LTC2912-3): OV/OV Latch Clear/Bypass Input. When pulled high, OV/OV latch 2912fa 5 LTC2912 PIN FUNCTIONS (DFN/TSOT Packages) OV (Pin 6/Pin 3, LTC2912-3): Overvoltage Logic Output. Asserts high with a weak internal pull-up to VCC when the VL input is above threshold. Latches high. May be pulled above VCC using an external pull-up. Leave pin open if unused. TMR (Pin 4/Pin 5): Reset Delay Timer. Attach an external capacitor (CTMR) of at least 10pF to GND to set a reset delay time of 9ms/nF. A 1nF capacitor will generate an 8.5ms reset delay time. Tie pin to VCC to bypass timer. UV (Pin 7/Pin 2): Undervoltage Logic Output. Asserts low when the VH input voltage is below threshold. Held low for a programmed delay time after the VH input is valid. Pin has a weak pull-up to VCC and may be pulled above VCC using an external pull-up. Leave pin open if unused. VCC (Pin 1/Pin 8): Supply Voltage. Bypass this pin to GND with a 0.1F (or greater) capacitor. Operates as a direct supply input for voltages up to 6V. Operates as a shunt regulator for supply voltages greater than 6V and should have a resistance between the pin and the supply to limit input current to no greater than 10mA. When used without a current-limiting resistance, pin voltage must not exceed 6V. VH (Pin 2/Pin 7): Voltage High Input. When the voltage on this pin is below 0.5V, an undervoltage condition is triggered. Tie pin to VCC if unused. VL (Pin 3/Pin 6): Voltage Low Input. When the voltage on this pin is above 0.5V, an overvoltage condition is triggered. Tie pin to GND if unused. BLOCK DIAGRAM 1 4 VCC TMR VCC 400k OSCILLATOR 2 UV - + VH UV PULSE GENERATOR DISABLE UVLO UVLO 3 + - 2V VCC VCC 400k - + VL 7 OV PULSE GENERATOR LTC2912-1 LTC2912-2 OV/OV 6 DISABLE 0.5V 5 GND LTC2912-3 OV LATCH CLEAR/BYPASS + - LATCH 8 1V LTC2912-1, LTC2912-3 1V DIS 8 + - 2A LTC2912-2 2912 BD 2912fa 6 LTC2912 APPLICATIONS INFORMATION Voltage Monitoring 2. Choose RB to obtain the desired UV trip point The LTC2912 is a low power voltage monitoring circuit with an undervoltage and an overvoltage input. A timeout period that holds OV and UV asserted after a fault has cleared is adjustable using an external capacitor and may be externally disabled. When configured to monitor a positive voltage Vn using the 3-resistor circuit configuration shown in Figure 1, VH will be connected to the high side tap of the resistive divider and VL will be connected to the low side tap of the resistive divider. Once RA is known, RB is chosen to set the desired trip point for the undervoltage monitor. V RB = 0.5V * n - RA In VUV 3. Choose RC to complete the design Once RA and RB are known, RC is determined by: RC = 3-Step Design Procedure The following 3-step design procedure allows selecting appropriate resistances to obtain the desired UV and OV trip points for the voltage monitor circuit in Figure 1. For supply monitoring, Vn is the desired nominal operating voltage, In is the desired nominal current through the resistive divider, VOV is the desired overvoltage trip point and VUV is the desired undervoltage trip point. 1. Choose RA to obtain the desired OV trip point RA is chosen to set the desired trip point for the overvoltage monitor. V R A = 0.5V * n In VOV (1) (2) Vn - RA - RB In (3) If any of the variables Vn, In, VUV or VOV change, then each step must be recalculated. Voltage Monitor Example A typical voltage monitor application is shown in Figure 2. The monitored voltage is a 5V 10% supply. Nominal current in the resistive divider is 10A. 1. Find RA to set the OV trip point of the monitor. RA = 0.5V * 5V 45.3k 10A 5.5V 2. Find RB to set the UV trip point of the monitor. RB = 0.5V * 5V - 45.3k 10.2k 10A 4.5V Vn RC LTC2912 VH + + - RB 3. Determine RC to complete the design. - UV 0.5V V1 5V 10% - VL RC = 5V - 45.3k - 10.2k 442k 10A + OV VCC 5V RC 442k VCC OV VH1 RA RB 10.2k 2912 F01 Figure 1. 3-Resistor Positive UV/OV Monitoring Configuration LTC2912-1 UV VL1 RA 45.3k GND 2912 F02 Figure 2. Typical Supply Monitor 2912fa 7 LTC2912 APPLICATIONS INFORMATION Power-Up/Power-Down As soon as VCC reaches 1V during power up, the UV output asserts low and the OV output weakly pulls to VCC. The LTC2912 is guaranteed to assert UV low, OV high (LTC2912-1, LTC2912-2) and OV low (LTC2912-3) under conditions of low VCC, down to VCC = 1V. Above VCC = 2V (2.1V maximum), the VH and VL inputs take control. Once the VH input and VCC become valid an internal timer is started. After an adjustable delay time, UV weakly pulls high. The two extreme conditions, with a relative accuracy of 1.5% and resistance accuracy of 1%, result in: RC * 0.99 VUV(MIN) = 0.5V * 0.985 * 1+ (RA + RB ) * 1.01 and RC * 1.01 VUV(MAX) = 0.5V * 1.015 * 1+ (RA + RB ) * 0.99 For a desired trip point of 4.5V, Threshold Accuracy Reset threshold accuracy is important in a supply-sensitive system. Ideally, such a system resets only if supply voltages fall outside the exact thresholds for a specified margin. Both LTC2912 inputs have a relative threshold accuracy of 1.5% over the full operating temperature range. For example, when the LTC2912 is programmed to monitor a 5V input with a 10% tolerance, the desired UV trip point is 4.5V. Because of the 1.5% relative accuracy of the LTC2912, the UV trip point can be anywhere between 4.433V and 4.567V which is 4.5V 1.5%. Likewise, the accuracy of the resistances chosen for RA, RB and RC can affect the UV and OV trip points as well. Using the example just given, if the resistances used to set the UV trip point have 1% accuracy, the UV trip range is between 4.354V and 4.650V. This is illustrated in the following calculations. The UV trip point is given as: RC VUV = 0.5V 1+ RA + RB RC =8 RA + RB Therefore, VUV(MIN) = 0.5V * 0.985 * 1+ 8 0.99 = 4.354V 1.01 and VUV(MAX) = 0.5V * 1.015 * 1+ 8 1.01 = 4.650V 0.99 Glitch Immunity In any supervisory application, noise riding on the monitored DC voltage causes spurious resets. To solve this problem without adding hysteresis, which causes a new error term in the trip voltage, the LTC2912 lowpass filters the output of the first stage comparator at each input. This filter integrates the output of the comparator before asserting the UV or OV logic. A transient at the input of the comparator of sufficient magnitude and duration triggers the output logic. The Typical Performance Characteristics show a graph of the Transient Duration vs Comparator Overdrive. UV/OV Timing The LTC2912 has an adjustable timeout period (tUOTO) that holds OV, OV or UV asserted after each fault has cleared. This delay assures a minimum reset pulse width allowing settling time for the monitored voltage after it has entered the "valid" region of operation. 2912fa 8 LTC2912 APPLICATIONS INFORMATION When the VH input drops below its designed threshold, the UV pin asserts low. When the input recovers above its designed threshold, the UV output timer starts. If the input remains above the designed threshold when the timer finishes, the UV pin weakly pulls high. However, if the input falls below its designed threshold during this timeout period, the timer resets and restarts when the input is above the designed threshold. The OV and OV outputs behave as the UV output when LATCH is high (LTC2912-1, LTC2912-3). Selecting the UV/OV Timing Capacitor The UV and OV timeout period (tUOTO) for the LTC2912 is adjustable to accommodate a variety of applications. Connecting a capacitor, CTMR, between the TMR pin and ground sets the timeout period. The value of capacitor needed for a particular timeout period is: CTMR = tUOTO * 115 * 10-9 [F/s] The Reset Timeout Period vs Capacitance graph found in the Typical Performance Characteristics shows the desired delay time as a function of the value of the timer capacitor that must be used. The TMR pin must have a minimum 10pF load or be tied to VCC. For long timeout periods, the only limitation is the availability of a large value capacitor with low leakage. Capacitor leakage current must not exceed the minimum TMR charging current of 1.3A.Tying the TMR pin to VCC bypasses the timeout period. Undervoltage Lockout When VCC falls below 2V, the LTC2912 asserts an undervoltage lockout (UVLO) condition. During UVLO, UV is asserted and pulled low while OV and OV are cleared and blocked from asserting. When VCC rises above 2V, UV follows the same timing procedure as an undervoltage condition on the VH input. Shunt Regulator The LTC2912 has an internal shunt regulator. The VCC pin operates as a direct supply input for voltages up to 6V. Under this condition, the quiescent current of the device remains below a maximum of 70A. For VCC voltages higher than 6V, the device operates as a shunt regulator and should have a resistance RZ between the supply and the VCC pin to limit the current to no greater than 10mA. When choosing this resistance value, select an appropriate location on the I-V curve shown in the Typical Performance Characteristics to accommodate any variations in VCC due to changes in current through RZ. UV, OV and OV Output Characteristics The DC characteristics of the UV, OV and 0V pull-up and pull-down strength are shown in the Typical Performance Characteristics. Each pin has a weak internal pull-up to VCC and a strong pull-down to ground. This arrangement allows these pins to have open-drain behavior while possessing several other beneficial characteristics. The weak pull-up eliminates the need for an external pull-up resistor when the rise time on the pin is not critical. On the other hand, the open-drain configuration allows for wired-OR connections, and is useful when more than one signal needs to pull down on the output. VCC of 1V guarantees a maximum VOL = 0.15V at UV. At VCC = 1V, the weak pull-up current on OV is barely turned on. Therefore, an external pull-up resistor of no more than 100k is recommended on the OV pin if the state and pull-up strength of the OV pin is crucial at very low VCC. Note however, by adding an external pull-up resistor, the pull-up strength on the OV pin is increased. Therefore, if it is connected in a wired-OR connection, the pull-down strength of any single device must accommodate this additional pull-up strength. Output Rise and Fall Time Estimation The UV, OV and OV outputs have strong pull-down capability. The following formula estimates the output fall time (90% to 10%) for a particular external load capacitance (CLOAD): tFALL 2.2 * RPD * CLOAD where RPD is the on-resistance of the internal pull-down transistor, typically 50 at VCC > 1V and at room temperature (25C). CLOAD is the external load capacitance on the pin. Assuming a 150pF load capacitance, the fall time is 16.5ns. 2912fa 9 LTC2912 APPLICATIONS INFORMATION similar timeout period at the output. If LATCH is pulled low while the timeout period is active, the OV and OV pins latch as before. The rise time on the UV, OV and 0V pins is limited by a 400k pull-up resistance to VCC. A similar formula estimates the output rise time (10% to 90%) at the UV, OV and OV pins: Disable (LTC2912-2) tRISE 2.2 * RPU * CLOAD The LTC2912-2 allows disabling the UV and OV outputs via the DIS pin. Pulling DIS high forces both outputs to remain weakly pulled high, regardless of any faults that occur on the inputs. However, if a UVLO condition occurs, UV asserts and pulls low, but the timeout function is bypassed. UV pulls high as soon as the UVLO condition is cleared. where RPU is the pull-up resistance. OV/OV Latch (LTC2912-1, LTC2912-3) With the LATCH pin held low, the OV pin latches low (LTC2912-1) and the OV pin latches high (LTC2912-3) when an OV condition is detected. The latch is cleared by raising the LATCH pin high. If an OV condition clears while LATCH is held high, the latch is bypassed and the OV and OV pins behave the same as the UV pin with a DIS has a weak 2A (typical) internal pull-down current guaranteeing normal operation with the pin left open. TYPICAL APPLICATIONS Dual UV/OV Supply Monitor, 3.3V 10% Tolerance POWER SUPPLY 48V Supply Monitor (<10% = Powergood) 3.3V POWER SUPPLY CBYP 0.1F RC 27.4k 2 RB 1k 3 48V CBYP 0.1F RZ 200k 1 VCC OV VH LTC2912-1 UV VL RA 4.53k GND 5 LATCH TMR 4 6 SYSTEM RC 37.4M 2 7 RB 80.6k 3 8 VCC OV VH LTC2912-2 UV VL RA 357k 2912 TA02 GND CTMR 22nF TIMEOUT = 200ms RPG 30k 1 5 DIS TMR 4 6 7 8 POWERGOOD LED CTMR 10nF TIMEOUT = 85ms 2912 TA03 Dual UV Supply Monitor, 3.3V, 2.5V, 10% Tolerance 3.3V POWER 2.5V SUPPLIES CBYP 0.1F 1 RB1 54.9k 2 VCC VH TMR 6 OV LTC2912-2 7 UV RA1 11k RB2 39.2k 3 RA2 11k ROV 10k 4 VL DIS GND RUV 10k SYSTEM 8 2912 TA04 5 2912fa 10 LTC2912 PACKAGE DESCRIPTION DDB Package 8-Lead Plastic DFN (3mm x 2mm) (Reference LTC DWG # 05-08-1702 Rev B) 0.61 0.05 (2 SIDES) 3.00 0.10 (2 SIDES) R = 0.115 TYP 5 R = 0.05 TYP 0.40 0.10 8 0.70 0.05 2.55 0.05 1.15 0.05 PACKAGE OUTLINE 2.00 0.10 (2 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) 0.25 0.05 0.56 0.05 (2 SIDES) 0.75 0.05 0.200 REF 0.50 BSC 2.20 0.05 (2 SIDES) 1 (DDB8) DFN 0905 REV B 0.50 BSC 2.15 0.05 (2 SIDES) 0 - 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 4 0.25 0.05 PIN 1 R = 0.20 OR 0.25 x 45 CHAMFER BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE TS8 Package 8-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1637) 0.52 MAX 0.65 REF 2.90 BSC (NOTE 4) 1.22 REF 1.4 MIN 3.85 MAX 2.62 REF 2.80 BSC 1.50 - 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.22 - 0.36 8 PLCS (NOTE 3) 0.65 BSC 0.80 - 0.90 0.20 BSC 0.01 - 0.10 1.00 MAX DATUM `A' 0.30 - 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 0.09 - 0.20 (NOTE 3) 1.95 BSC TS8 TSOT-23 0802 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 2912fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC2912 TYPICAL APPLICATION Single UV/OV Supply Monitor with 3.3V 10% 12V POWER SUPPLY Q1 3.3V 0.1F 10k 27.4k SYSTEM VCC VH OV LTC2912-3 1k UV VL 4.53k GND LATCH TMR 2912 TA05 22nF TIMEOUT = 200ms RELATED PARTS PART NUMBER LTC690 LTC694-3.3 LTC699 LTC1232 LTC1326/ LTC1326-2.5 LTC1536 LTC1726-2.5/ LTC1726-5 LTC1728-1.8/ LTC1728-3.3 LTC1985-1.8 LTC2900 LTC2901 LTC2902 LTC2903 LTC2904 LTC2905 LTC2906 LTC2907 LTC2908 LTC2909 LTC2913 LTC2914 DESCRIPTION 5V Supply Monitor, Watchdog Timer and Battery Backup 3.3V Supply Monitor, Watchdog Timer and Battery Backup 5V Supply Monitor and Watchdog Timer 5V Supply Monitor, Watchdog Timer and Push-Button Reset Micropower Precision Triple Supply Monitor for 5V/2.5V, 3.3V and ADJ Precision Triple Supply Monitor for PCI Applications Micropower Triple Supply Monitor for 2.5V/5V, 3.3V and ADJ COMMENTS 4.65 Threshold 2.9V Threshold 4.65 Threshold 4.37V/4.62V Threshold 4.725V, 3.118V, 1V Threshold (0.75%) Micropower Triple Supply Monitor with Open-Drain Reset 5-Lead SOT-23 Package Meets PCI tFAIL Timing Specifications Adjustable RESET and Watchdog Time-Outs Micropower Triple Supply Monitor with Open-Drain Reset Programmable Quad Supply Monitor 5-Lead SOT-23 Package Adjustable RESET, 10-Lead MSOP and 3mm x 3mm 10-Lead DFN Package Programmable Quad Supply Monitor Adjustable RESET and Watchdog Timer, 16-Lead SSOP Package Programmable Quad Supply Monitor Adjustable RESET and Tolerance, 16-Lead SSOP Package, Margining Functions Precision Quad Supply Monitor 6-Lead TSOT-23 Package, Ultralow Voltage Reset 3-State Programmable Precision Dual Supply Monitor Adjustable Tolerance, 8-Lead TSOT-23 Package 3-State Programmable Precision Dual Supply Monitor Adjustable RESET and Tolerance, 8-Lead TSOT-23 Package Precision Dual Supply Monitor 1-Selectable and 1 Adjustable Separate VCC Pin, RST/RST Outputs Precision Dual Supply Monitor 1-Selectable and 1 Adjustable Separate VCC, Adjustable Reset Timer Precision Six Supply Monitor (Four Fixed & 2 Adjustable) 8-Lead TSOT-23 and DFN Packages Prevision Dual Input UV, OV and Negative Voltage Monitor Separate VCC Pin, Adjustable Reset Timer, 8-Lead TSOT-23 and DFN Packages Dual UV/OV Voltage Monitor Separate VCC Pin, Two Inputs, Adjustable Reset Timer, 10-Lead MSOP and DFN Packages Quad UV/OV Positive/Negative Voltage Monitor Separate VCC Pin, Four inputs, Up To Two Negative Monitors, Adjustable Reset Timer, 16-Lead TSSOP and DFN Packages 2912fa 12 Linear Technology Corporation LT 1007 REV A * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com (c) LINEAR TECHNOLOGY CORPORATION 2006