1. Product profile
1.1 General description
PNP/PNP double Resistor-Equipped Transistors (RET) in Surface-Mounted
Device (SMD) plastic packages.
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
PEMB15; PUMB15
PNP/PNP resistor-equipped transistors;
R1 = 4.7 k, R2 = 4.7 k
Rev. 5 — 16 December 2011 Product data sheet
Table 1. Product overview
Type number Package NPN/PNP
complement NPN/NPN
complement Package
configuration
NXP JEITA
PEMB15 SOT666 - PEMD15 PEMH15 ultra small and flat lead
PUMB15 SOT363 SC-88 PUMD15 PUMH15 very small
100 mA output current capability Reduces component count
Built-in bias resistors Reduces pick and place costs
Simplifies circuit design AEC-Q101 qualified
Low current peripheral driver
Control of IC inputs
Replaces general-purpose transistors in digital applications
Table 2. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
Per transis tor
VCEO collector-emitter voltage open base - - 50 V
IOoutput current - - 100 mA
R1 bias resistor 1 (input) 3.3 4.7 6.1 k
R2/R1 bias resistor ratio 0.8 1 1.2
PEMB15_PUMB15 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 16 December 2011 2 of 14
NXP Semiconductors PEMB15; PUMB15
PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
2. Pinning information
3. Ordering information
4. Marking
[1] * = placeholder for manufacturing site code
Table 3. Pinning
Pin Description Simplified outline Graphic symbol
1 GND (emitter) TR1
2 input (base) TR1
3 output (collector) TR2
4 GND (emitter) TR2
5 input (base) TR2
6 output (collector) TR1
001aab555
6 45
1 32
006aaa212
5
R1 R2
R2
TR1 TR2
R1
64
213
Table 4. Orderin g information
Type number Package
Name Description Version
PEMB15 - plastic surface-mounted package; 6 leads SOT666
PUMB15 SC-88 plastic surface-mounted package; 6 leads SOT363
Table 5. Marking codes
Type number Marking code[1]
PEMB15 5D
PUMB15 B*6
PEMB15_PUMB15 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 16 December 2011 3 of 14
NXP Semiconductors PEMB15; PUMB15
PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
5. Limiting values
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2] Reflow soldering is the only recommended soldering method.
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per transis tor
VCBO collector-base voltage open emitter - 50 V
VCEO collector-emitter voltage open base - 50 V
VEBO emitter-base voltage open collector - 10 V
VIinput voltage
positive - +10 V
negative - 30 V
IOoutput current - 100 mA
ICM peak collector current single pulse;
tp1ms -100 mA
Ptot total power dissipation Tamb 25 C
PEMB15 (SOT666) [1][2] -200mW
PUMB15 (SOT363) [1] -200mW
Per device
Ptot total power dissipation Tamb 25 C
PEMB15 (SOT666) [1][2] -300mW
PUMB15 (SOT363) [1] -300mW
Tjjunction temperature - 150 C
Tamb ambient temperature 65 +150 C
Tstg storage temperature 65 +150 C
PEMB15_PUMB15 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 16 December 2011 4 of 14
NXP Semiconductors PEMB15; PUMB15
PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
6. Thermal characteristics
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Reflow soldering is the only recommended soldering method.
FR4 PCB, standard footprint
Fig 1. Per device: Power derating curve for SOT363 (SC-88) and SOT666
Tamb (°C)
-75 17512525 75-25
006aac749
200
100
300
400
Ptot
(mW)
0
Table 7. Thermal characteris tics
Symbol Parameter Conditions Min Typ Max Unit
Per transis tor
Rth(j-a) thermal resistance from
junction to ambient in free air
PEMB15 (SOT666) [1][2] - - 625 K/W
PUMB15 (SOT363) [1] - - 625 K/W
Per device
Rth(j-a) thermal resistance from
junction to ambient in free air
PEMB15 (SOT666) [1][2] - - 417 K/W
PUMB15 (SOT363) [1] - - 417 K/W
PEMB15_PUMB15 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 16 December 2011 5 of 14
NXP Semiconductors PEMB15; PUMB15
PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
FR4 PCB, standard footprint
Fig 2. Per transistor: T ransient thermal impedance from junction to ambient as a function of pulse duration for
PEMB15 (SOT666); typical values
FR4 PCB, standard footprint
Fig 3. Per transistor: T ransient thermal impedance from junction to ambient as a function of pulse duration for
PUMB15 (SOT363); typical values
006aac751
10-5 1010-2
10-4 102
10-1 tp (s)
10-3 103
1
102
10
103
Zth(j-a)
(K/W)
1
duty cycle = 1
0.75 0.5
0.33 0.2
0.1
0.05
0.02 0.01
0
006aac750
10-5 1010-2
10-4 102
10-1 tp (s)
10-3 103
1
102
10
103
Zth(j-a)
(K/W)
1
duty cycle = 1
0.75 0.5
0.33
0.2
0.1 0.05
0.02 0.01
0
PEMB15_PUMB15 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 16 December 2011 6 of 14
NXP Semiconductors PEMB15; PUMB15
PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
7. Characteristics
[1] Characteristics of built-in transistor
Table 8. Characteristics
Tamb =25
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per transis tor
ICBO collector-base cut-off
current VCB =50 V; IE=0A - - 100 nA
ICEO collector-emitter cut-off
current VCE =30 V; IB=0A - - 1A
VCE =30 V; IB=0A;
Tj=150C--5A
IEBO emitter-base cut-of f
current VEB =5V; I
C=0A - - 900 A
hFE DC curren t ga in VCE =5V; I
C=10 mA 30 - -
VCEsat collector-emitter
saturation voltage IC=10 mA; IB=0.5 mA - - 150 mV
VI(off) off-state input voltage VCE =5V; I
C=100 A- 1.1 0.5 V
VI(on) on-state input voltage VCE =0.3 V;
IC=20 mA 2.5 1.9 - V
R1 bias resistor 1 (input) 3.3 4.7 6.1 k
R2/R1 bias resistor ratio 0.8 1 1.2
Cccollector capacitance VCB =10 V; IE=i
e=0A;
f=1MHz --3pF
fTtransition frequency VCE =5V; I
C=10 mA;
f=100MHz [1] - 180 - MHz
PEMB15_PUMB15 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 16 December 2011 7 of 14
NXP Semiconductors PEMB15; PUMB15
PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
VCE =5V
(1) Tamb = 100 C
(2) Tamb =25C
(3) Tamb =40 C
IC/IB=20
(1) Tamb = 100 C
(2) Tamb =25C
(3) Tamb =40 C
Fig 4. DC current gain as a function of collector
current; typical values Fig 5. Collec tor-emitter sa tu ration voltage as a
function of collector current; typical values
VCE =0.3 V
(1) Tamb =40 C
(2) Tamb =25C
(3) Tamb = 100 C
VCE =5V
(1) Tamb =40 C
(2) Tamb =25C
(3) Tamb = 100 C
Fig 6. On-state input voltage as a function of
collector current; typical valu es Fig 7. Off-state input voltage as a function of
collector current; typical values
IC (mA)
-10-1 -102
-10-1
006aac836
102
10
103
hFE
1
(1)
(2)
(3)
IC (mA)
-1 -102
-10
006aac837
-10-1
-1
VCEsat
(V)
-10-2
(1)
(2)
(3)
006aac838
IC (mA)
-10-1 -102
-10-1
-1
-10
VI(on)
(V)
-10-1
(1)
(2)
(3)
IC (mA)
-10-1 -10-1
006aac839
-1
-10
VI(off)
(V)
-10-1
(1)
(2)
(3)
PEMB15_PUMB15 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 16 December 2011 8 of 14
NXP Semiconductors PEMB15; PUMB15
PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
8. Test information
8.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is
suitable for use in automotive applications.
9. Package outline
f=1MHz; T
amb =25CV
CE =5V; T
amb =25C
Fig 8. Collector capacitance as a function of
collector-base voltage; typical values Fig 9. Transition frequency as a function of collector
current; typical values of built-in transistor
VCB (V)
0 -50-40-20 -30-10
006aac840
4
2
6
8
Cc
(pF)
0
006aac763
IC (mA)
-10-1 -102
-10-1
102
103
fT
(MHz)
10
Fig 10. Package outline PEMB15 (SOT666) Fig 11. Package outline PUMB15 (SOT363)
Dimensions in mm 04-11-08
1.7
1.5
1.7
1.5
1.3
1.1
1
0.18
0.08
0.27
0.17
0.5
pin 1 index
123
456
0.6
0.5
0.3
0.1
06-03-16Dimensions in mm
0.25
0.10
0.3
0.2
pin 1
index
1.3
0.65
2.2
2.0 1.35
1.15
2.2
1.8 1.1
0.8
0.45
0.15
132
465
PEMB15_PUMB15 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 16 December 2011 9 of 14
NXP Semiconductors PEMB15; PUMB15
PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
10. Packing information
[1] For further information and the availability of packing methods, see Section 14.
[2] T1: normal taping
[3] T2: reverse taping
11. Soldering
Table 9. Packing methods
The indicated -xxx are the last thre e digits of the 12NC ordering code.[1]
Type
number Package Description Packing quantity
3000 4000 8000 10000
PEMB15 SOT666 2 mm pitch, 8 mm tape and reel - - -315 -
4 mm pitch, 8 mm tape and reel - -115 - -
PUMB15 SOT363 4 mm pitch, 8 mm tape and reel; T1 [2] -115 - - -135
4 mm pitch, 8 mm tape and reel; T2 [3] -125 - - -165
Reflow soldering is the only recommended soldering method.
Fig 12. Reflow soldering footprint PEMB15 (SOT666)
solder lands
placement area
occupied area
solder paste
sot666_fr
2.75
2.45
2.1
1.6
0.4
(6×)
0.55
(2×)
0.25
(2×)
0.6
(2×)
0.65
(2×)
0.3
(2×)
0.325
(4×)
0.45
(4×)
0.5
(4×)
0.375
(4×)
1.72
1.7
1.0750.538
Dimensions in mm
PEMB15_PUMB15 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 16 December 2011 10 of 14
NXP Semiconductors PEMB15; PUMB15
PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
Fig 13. Reflow soldering footprint PUMB15 (SOT363)
Fig 14. W ave soldering footprint PUMB15 (SOT363)
solder lands
solder resist
occupied area
solder paste
sot363_fr
2.65
2.35 0.4 (2×)
0.6
(2×)
0.5
(4×)
0.5
(4×)
0.6
(4×)
0.6
(4×)
1.5
1.8
Dimensions in mm
PEMB15_PUMB15 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 16 December 2011 11 of 14
NXP Semiconductors PEMB15; PUMB15
PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
12. Revision history
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PEMB15_PUMB15 v.5 20111216 Product data sheet - PEMB15_PUMB15 v.4
Modifications: •Section 1 “Product profile”: updated
•Section 4 “Marking”: updated
•Figure 1 to 3: added
•Section 6 “Thermal characteristics”: updated
•Figure 4 to 9: updated
•Table 8 “Characteristics”: ICEO upd ated, fT added
•Section 8 “Test information”: added
•Section 9 “Package outline”: superseded by minimized package outline drawings
•Section 11 “Soldering”: added
•Section 13 “Legal information”: updated
PEMB15_PUMB15 v.4 20090831 Product data sheet - PEMB15_PUMB15 v.3
PEMB15_PUMB15 v.3 20050203 Product data sheet - PUMB15 v.2
PUMB15 v.2 20040414 Product specification - PUMB15 v.1
PUMB15 v.1 20031107 Product specification - -
PEMB15_PUMB15 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 16 December 2011 12 of 14
NXP Semiconductors PEMB15; PUMB15
PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
13. Legal information
13.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short dat a sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specificatio n — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
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Limited warr a nty and liability — Information in this document is believed to
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Notwithstanding any damages that customer might incur for any reason
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risk.
Applications — Applications that are described herein for any of these
products are for il lustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
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applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the applicatio n or use by custo mer’s
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Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
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products are sold subject to the general terms and conditions of commercial
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purchase of NXP Semiconductors products by customer.
No offer to sell or license — Not hing in this document may be interpret ed or
construed as an of fer t o sell product s that is open for accept ance or t he grant,
conveyance or implication of any license under any copyri ghts, patents or
other industrial or intellectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specif ication for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
PEMB15_PUMB15 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 16 December 2011 13 of 14
NXP Semiconductors PEMB15; PUMB15
PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
13.4 Trademarks
Notice: All refe renced brands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
14. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors PEMB15; PUMB15
PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
© NXP B.V. 2011. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 16 December 2011
Document identifier: PEMB15_PUMB15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
15. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 8
8.1 Quality information . . . . . . . . . . . . . . . . . . . . . . 8
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
10 Packing information . . . . . . . . . . . . . . . . . . . . . 9
11 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
13.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
14 Contact information. . . . . . . . . . . . . . . . . . . . . 13
15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14