FEATURES
DLOW QUIESCENT CURRENT: 40µA/channel
Shut Down: < 1µA
DHIGH GAIN ACCURACY: G = 5, 0.02%,
2ppm/°C
DGAIN SET WITH EXTERNAL RESISTORS
DLOW OFFSET VOLTAGE: ±200µV
DHIGH CMRR: 94dB
DLOW BIAS CURRENT: 10pA
DBANDWIDTH: 500kHz, G = 5V/V
DRAIL-TO-RAIL OUTPUT SWING: (V+) − 0.02V
DWIDE TEMPERATURE RANGE:
−55°C to +125°C
DSINGLE VERSION IN MSOP-8 PACKAGE AND
DUAL VERSION IN TSSOP-14 PACKAGE
DESCRIPTION
The INA321 family is a series of rail-to-rail output,
micropower CMOS instrumentation amplifiers that offer
wide-range, single-supply, as well as bipolar-supply
operation. The INA321 family provides low-cost, low-noise
amplification of differential signals with micropower
current consumption of 40µA. When shutdown, the
INA321 has a quiescent current of less than 1µA.
Returning to normal operations within microseconds, the
shutdown feature makes the INA321 optimal for
low-power battery or multiplexing applications.
Configured internally for 5V/V gain, the INA321 offers
exceptional flexibility with user-programmable external
gain resistors. The INA321 reduces common-mode error
over frequency and with CMRR remaining high up to 3kHz,
line noise and line harmonics are rejected.
The low-power design does not compromise on bandwidth
or slew rate, making the INA321 ideal for driving sample
Analog-to-Digital (A/D) converters as well as
general-purpose applications. With high precision, low
cost, and small packaging, the INA321 outperforms
discrete designs, while offering reliability and
performance.
APPLICATIONS
DINDUSTRIAL SENSOR AMPLIFIERS:
Bridge, RTD, Thermistor, Position
DPHYSIOLOGICAL AMPLIFIERS:
ECG, EEG, EMG
DA/D CONVERTER SIGNAL CONDITIONING
DDIFFERENTIAL LINE RECEIVERS WITH GAIN
DFIELD UTILITY METERS
DPCMCIA CARDS
DCOMMUNICATION SYSTEMS
DTEST EQUIPMENT
DAUTOMOTIVE INSTRUMENTATION
CMRR vs FREQUENCY
Frequency (Hz)
CMRR (dB)
1k10 100 10k
120
100
80
60
40
INA321
Nearest
Competition
10x
Improvement
A2
A1 A3
160kΩ
REF
VIN−
VIN+
40kΩ40kΩ
Shutdown V+
VOUT
VOUT =(V
IN+ −VIN−)•Gain
Gain=5+5(R2/R1)
V−
R2
R1RG
160kΩ
INA321
INA2321
SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006
microPower, Single-Supply, CMOS
Instrumentation Amplifier
www.ti.com
Copyright 2000-2006, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty , and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
! !
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SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006
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2
ABSOLUTE MAXIMUM RATINGS(1)
Supply V oltage, V+ to V− 7.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal Input Terminals Voltage(2) (V−) − (0.5V) to (V+) + (0.5V). . .
Current(2) 10mA. . . . . . . . . . . . . . . . . . . . .
Output Short-Circuit(3) Continuous. . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature −65°C to +150°C. . . . . . . . . . . . . . . . . . . . . .
Storage Temperature −65°C to +150°C. . . . . . . . . . . . . . . . . . . . . . . .
Junction Temperature +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only , an d
functional operation of the device at these or any other conditions
beyond those specified is not supported.
(2) Input terminals are diode-clamped to the power-supply rails.
Input signals that can swing more than 0.5V beyond the supply
rails should be current limited to 10mA or less.
(3) Short-circuit to ground, one amplifier per package.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instruments
recommends that all integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION (1)
PRODUCT PACKAGE-LEAD PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING ORDERING
NUMBER TRANSPORT
MEDIA, QUANTITY
SINGLE
INA321E MSOP-8 DGK −55°C to +125°C C21 INA321E/250 Tape and Reel, 250
″ ″ ″ ″ ″ INA321E/2K5 Tape and Reel, 2500
INA321EA MSOP-8 DGK −55°C to +125°C C21 INA321EA/250 Tape and Reel, 250
″ ″ ″ ″ ″ INA321EA/2K5 Tape and Reel, 3000
DUAL
INA2321EA TSSOP-14 PW −55°C to +125°C INA2321EA INA2321EA/250 Tape and Reel, 250
″ ″ ″ ″ ″ INA2321EA/2K5 Tape and Reel, 2500
(1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet.
PIN CONFIGURATIONS
Top View
RG
VIN−
VIN+
V−
Shutdown
V+
VOUT
REF
INA321
MSOP−8 (E, EA)
1
2
3
4
8
7
6
5
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Shutdown A
VOUTA
REFA
V+
REFB
VOUTB
Shutdown B
RGA
VIN−A
VIN+A
V−
VIN+B
VIN−B
RGB
INA2321
Dual, TSSOP−14 (EA)
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SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006
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3
ELECTRICAL CHARACTERISTICS: VS = +2.7V to +5.5V
BOLDFACE limits apply over the specified temperature range, TA = −555C to +1255C.
At TA = +25°C, RL = 25kΩ, G = 25, and IA common = VS/2, unless otherwise noted.
INA321E INA321EA
INA2321EA
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
INPUT
Input Offset Voltage, RTI VS = +5V ±0.2 ±0.5 ∗1 mV
Over Temperature VOS ±2.2 2.5 mV
vs Temperature dVOS/dT ±7*µV/°C
vs Power Supply PSRR VS = +2.7V to +5.5V ±50 ±200 ∗ ∗ µV/V
Over Temperature ±220 *µV/V
Long-Term Stabilit y ±0.4 ∗ µV/month
Input Impedance 1013 || 3 ∗ Ω || pF
Input Common-Mode Range VS = 2.7V 0.35 1.5 ∗ ∗ V
VS = 5V 0.55 3.8 ∗ ∗ V
Common-Mode
Rejection CMRR VS = 5V, VCM = 0.55V to 3.8V 90 94 80 ∗dB
Over Temperature VS = 5V, VCM = 0.55V to 3.8V 77 75 dB
VS = 2.7V, VCM = 0.35V to 1.5V 94 ∗dB
Crosstalk, Dual 110 ∗dB
INPUT BIAS CURRENT
Bias Current IB±0.5 ±10 ∗ ∗ pA
Offset Current IOS ±0.5 ±10 ∗ ∗ pA
NOISE, RTI enRS = 0Ω
Voltage Noise: f = 10Hz 500 ∗nV/√Hz
f = 100Hz 190 ∗nV/√Hz
f = 1kHz 100 ∗nV/√Hz
f = 0.1Hz to 10Hz 20 ∗ µVPP
Current Noise: f = 1kHz 3∗fA/√Hz
GAIN(1)
Gain Equation, Externally Set G > 5 G = 5 + 5 (R2/R1) ∗
Range of Gain 5 1000 ∗ ∗ V/V
Gain Error ±0.02 ±0.1 ∗ ∗ %
vs Temperature G = 5 ±2±10 * * ppm/°C
Nonlinearity G = 25, VS = 5V, VO = 0.05 to 4.95 ±0.001 ±0.010 ∗ ∗ % of FS
Over Temperature ±0.002 ±0.015 * * % of FS
OUTPUT
Output Voltage Swing from Rail(2, 5) G ≥ 10 50 25 ∗ ∗ mV
Over Temperature 50 *mV
Capacitance Load Drive See Typical Characteristic(3) ∗pF
Short-Circuit Current +ISC 8
−ISC 16 ∗mA
NOTE:∗ Specification is same as INA321E.
(1) Does not include errors from external gain setting resistors.
(2) Output voltage swings are measured between the output and power-supply rails.
(3) See typical characteristic Percent Overshoot vs Load Capacitance.
(4) See typical characteristic Shutdown Voltage vs Supply V oltage.
(5) Output does not swing to positive rail if gain is less than 10.
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4
ELECTRICAL CHARACTERISTICS: VS = +2.7V to +5.5V (continued)
BOLDFACE limits apply over the specified temperature range, TA = −555C to +1255C.
At TA = +25°C, RL = 25kΩ, G = 25, and IA common = VS/2, unless otherwise noted.
INA321EA
INA2321EA
INA321E
PARAMETER UNITMAXTYPMINMAXTYPMINCONDITIONS
FREQUENCY RESPONSE
Bandwidth, −3dB BW G = 5 500 ∗kHz
Slew Rate SR V S = 5V, G = 25 0.4 ∗V/µs
Settling Time, 0.1% tSG = 5, CL = 50pF, VO = 2V s tep 8∗ µs
0.01% 12 ∗ µs
Overload Recovery 50% Input Overload G = 25 2∗ µs
POWER SUPPLY
Specified Voltage Range +2.7 +5.5 ∗ ∗ V
Operating Voltage Range +2.5 to +5.5 ∗V
Quiescent Current IQper Channel, VSD > 2.5(4) 40 60 ∗ ∗ µA
Over Temperature 70 *µA
Shutdown Quiescent Current ISD per Channel, VSD > 0.8(4) 0.01 1 ∗ ∗ µA
TEMPERATURE RANGE
Specified Range −55 +125 ∗ ∗ °C
Operating/Storage Range −65 +150 ∗ ∗ °C
Thermal Resistance qJA MSOP-8, TSSOP-14
Surface-Mount 150 ∗ °C/W
NOTE:∗ Specification is same as INA321E.
(1) Does not include errors from external gain setting resistors.
(2) Output voltage swings are measured between the output and power-supply rails.
(3) See typical characteristic Percent Overshoot vs Load Capacitance.
(4) See typical characteristic Shutdown Voltage vs Supply V oltage.
(5) Output does not swing to positive rail if gain is less than 10.
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5
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = 5V, VCM =1/2VS, RL = 25kΩ, and CL = 50pF, unless otherwise noted.
GAIN vs FREQUENCY
10
Gain (dB)
Frequency (Hz)
100 1k 10k 100k 1M 10M
80
70
60
50
40
30
20
10
0
−10
−20
Gain = 500
Gain = 100
Gain = 25
Gain = 5
COMMON−MODE REJECTION RATIO
vs FREQUENCY
10
CMRR (dB)
Frequency (Hz)
100 1k 10k 100k
120
100
80
60
40
20
0
POWER−SUPPLY REJECTION RATIO
vs FREQUENCY
1
PSRR (dB)
Frequency (Hz)
10 100 1k 10k 100k
100
90
80
70
60
50
40
30
20
10
0
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
100
Maximum Output Voltage (VPP)
Frequency (Hz)
1k 10k 100k 1M 10M
6
5
4
3
2
1
0
VS=5.5V
VS=5.0V
VS=2.7V
NOISE vs FREQUENCY
1
VNOISE (nV/√Hz)
Frequency (Hz)
10 100 10k1k 100k
10k
1k
100
10
100
10
1
0.1
INoise (fA/√Hz)
0.1Hz TO 10Hz VOLTAGE NOISE
1s/div
10µv/div
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6
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = 5V, VCM =1/2VS, RL = 25kΩ, and CL = 50pF, unless otherwise noted.
To Positive Rail
To Negative Rail
OUTPUT SWING vs LOAD RESISTANCE
0
Swing−to−Rail (mV)
RLOAD (Ω)
20k 40k 60k 80k 100k
25
20
15
10
5
0
COMMON−MODE INPUT RANGE
vs REFERENCE VOLTAGE
0
Output
Referred to Ground (V)
Input Common−Mode Voltage (V)
12345
6
5
4
3
2
1
0
Outside of Normal Operation
REF
Increasing
QUIESCENT CURRENT AND SHUTDOWN CURRENT
vs POWER SUPPLY
IQ(µA)
ISD (nA)
Supply Voltage (V)
2.5 3 3.5 4 4.5 5 5.5
50
45
40
35
30
25
20
15
10
5
0
500
450
400
350
300
250
200
150
100
50
0
IQ
ISD
QUIESCENT CURRENT AND SHUTDOWN CURRENT
vs TEMPERATURE
−75
IQ(µA)
600
500
400
300
200
100
0
ISD (nA)
Temperature (_C)
−50 −25 0 25 50 75 100 125 150
60
55
50
45
40
35
30
25
20
15
10
5
0
IQ
ISD
SHORT−CIRCUIT CURRENT vs POWER SUPPLY
ISC (mA)
Supply Voltage (V)
2.533.544.555.5
20
15
10
5
0
ISC+
ISC−
SHORT−CIRCUIT CURRENT vs TEMPERATURE
−75
ISC (mA)
Temperature (_C)
−50 −25 0 25 50 75 100 125 150
30
25
20
15
10
5
0
ISC+
ISC−
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7
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = 5V, VCM =1/2VS, RL = 25kΩ, and CL = 50pF, unless otherwise noted.
SMALL−SIGNAL STEP RESPONSE (G = 5)
10µs/div
100mV/div
SMALL−SIGNAL STEP RESPONSE (G = 100)
50µs/div
50mV/div
SMALL−SIGNAL STEP RESPONSE
(G = 5, CL= 1000pF)
10µs/div
100mV/div
SMALL−SIGNAL STEP RESPONSE
(G = 100, CL= 1000pF)
50µs/div
50mV/div
SMALL−SIGNAL STEP RESPONSE
(G = 100, CL= 5000pF)
50µs/div
50mV/div
50µs/div
1V/div
LARGE−SIGNAL STEP RESPONSE
(G = 25, CL=50pF)
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8
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = 5V, VCM =1/2VS, RL = 25kΩ, and CL = 50pF, unless otherwise noted.
SETTLING TIME vs GAIN
1 10 100 1000
Gain (V/V)
Settling Time (µs)
100
90
80
70
60
50
40
30
20
10
0
Output 2VPP
Differential
Input Drive
0.01%
0.1%
PERCENT OVERSHOOT vs LOAD CAPACITANCE
10 100 1k 10k
Load Capacitance (pF)
Overshoot (%)
60
50
40
30
20
10
0
Output 100mVPP
Differential
Input Drive G=5
G=25
SHUTDOWN VOLTAGE vs SUPPLY VOLTAGE
2.3
Shutdown (V)
Supply Voltage (V)
33.544.555.5
3
2.5
2
1.5
1
0.5
0
Normal Operation Mode
Part Draws Below 1µA Quiescent Current
Operation in this Region
is not Recommended
Shutdown Mode
SHUTDOWN TRANSIENT BEHAVIOR
50µs/div
1V/div
VSD
VOUT
25
20
15
10
5
0
−1.0
−0.9
−0.8
−0.7
−0.6
−0.5
−0.4
−0.3
−0.2
−0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
Offset Voltage (mV)
Percentage of Amplifiers (%)
OFFSET VOLTAGE PRODUCTION DISTRIBUTION 20
18
16
14
12
10
8
6
4
2
0
−20
−18
−16
−14
−12
−10
−8
−6
−4
−2
0
2
4
6
8
10
12
14
16
18
20
Offset Voltage Drift (µV/_C)
Percentage of Amplifiers (%)
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
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9
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = 5V, VCM =1/2VS, RL = 25kΩ, and CL = 50pF, unless otherwise noted.
SLEW RATE vs TEMPERATURE
Slew Rate (V/µs)
Temperature (_C)
−75 25
−50 −25 0 50 75 100 125 150
1
0.8
0.6
0.4
0.2
0
INPUT BIAS CURRENT vs TEMPERATURE
−75 −50 −25 0 25 50 75 100 125 150
Temperature (_C)
Input Bias Current (pA)
10k
1k
100
10
0
0.1
CROSSTALK vs FREQUENCY
0.1 1 10 100 1k 10k 100k 1M
Frequency (Hz)
Crosstalk (dB)
120
100
80
60
40
20
0
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
0 2 4 6 81012141618202224
Output Current (mA)
Output Voltage (V)
5
4
3
2
1
0
−55_C
−55_C
+125°C +25°C
+125°C +25°C
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10
APPLICATIONS INFORMATION
The INA321 is a modified version of the classic two op amp
instrumentation amplifier, with an additional gain amplifier.
Figure 1 shows the basic connections for the operation of
the INA321 and INA2321. The power supply should be
capacitively decoupled with 0.1µF capacitors as close to
the INA321 as possible for noisy or high-impedance
applications.
The output is referred to the reference terminal, which
must be at least 1.2V below the positive supply rail.
OPERATING VOLTAGE
The INA321 family is fully specified over a supply range of
+2.7V to +5.5V, with key parameters assured over the
temperature range of −55°C to +125°C. Parameters that
vary significantly with operating conditions, such as load
conditions or temperature, are shown in the Typical
Characteristics.
The INA321 may be operated on a single supply. Figure 2
shows a bridge amplifier circuit operated from a single +5 V
supply. The bridge provides a small differential voltage
riding on an input common-mode voltage.
160kΩ40kΩ
40kΩ
160kΩ
3
2
5
1
78 4Also drawn in simplified form:
6
REF
0.1µF0.1
µF
RG
VIN−
VIN+
V−
V+
A1 A3
A2
VO=((V
IN+) −(VIN −)) •G
Short VOUT to RG
for G = 5 5
10
50
100
SHORT
100kΩ
90kΩ
190kΩ
OPEN
100kΩ
10kΩ
10kΩ
R2
R1
Shutdown (For Single
Supply)
DESIRED GAIN
(V/V) R1R2
G=5+5(R
2/R
1)
INA321
5
3
2
VOUT
8
7
6
41
V+ Shutdown
RG
VIN−
V−
VIN+
REF
Figure 1. Basic Connections
Bridge
Sensor
+5V
NOTE: (1) REF should be adjusted for the desired output level,
keeping in mind that the value of REF affects the common−mode
input range. See Typical Characteristics.
INA321
5
3
2
VOUT
8
7
6
41
V+ Shutdown
RG
VIN−
V−
VIN+
REF(1)
Figure 2. Bridge Amplifier of the INA321
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11
SETTING THE GAIN
The ratio of R2 to R1, or the impedance between pins 1, 5,
and 6, determines the gain of the INA321. With an
internally set gain of 5, the INA321 can be programmed for
gains greater than 5 according to the following equation:
G = 5 + 5 (R2/R1)
The INA321 is designed to provide accurate gain, with gain
error assured to be less than 0.1%. Setting gain with
matching TC resistors will minimize gain drift. Errors from
external resistors will add directly to the gain error, and
may become dominant error sources.
INPUT COMMON-MODE RANGE
The upper limit of the common-mode input range is set by
the common-mode input range of the second amplifier, A2,
to 1.2V below positive supply. Under most conditions, the
amplifier operates beyond this point with reduced
performance. The lower limit of the input range is bounded
by the output swing of amplifier A1, and is a function of the
reference voltage according to the following equation:
VOA1 = 5/4 VCM — 1/4 VREF
(See Typical Characteristics for Input Common-Mode
Range vs Reference Voltage).
REFERENCE
The reference terminal defines the zero output voltage
level. In setting the reference voltage, the common-mode
input of A 3 should be considered according to the following
equation:
VOA2 = VREF + 5 (VIN+ − VIN−)
For optimal operation, VOA2 should be less than
VDD − 1.2V.
The reference pin requires a low-impedance connection.
As little as 160Ω in series with the reference pin will
degrade the CMRR to 80dB. The reference pin may be
used to compensate for the offset voltage (see Offset
Trimming section). The reference voltage level also
influences the common-mode input range (see
Common-Mode Input Range section).
INPUT BIAS CURRENT RETURN
With a high input impedance of 1 013Ω, the INA321 is ideal
for use with high-impedance sources. The input bias
current of less than 10pA makes the INA321 nearly
independent of input impedance and ideal for low-power
applications.
For proper operation, a path must be provided for input
bias currents for both inputs. Without input bias current
paths, the inputs will float to a potential that exceeds
common-mode range and the input amplifier will saturate.
Figure 3 shows how bias current path can be provided in
the cases of microphone applications, thermistor
applications, ground returns, and dc-coupled resistive
bridge applications.
47kΩ
Microphone,
Hydrophone,
etc.
Center−tap
provides bias
current return
Bridge resistance
provides bias
current return
Transformer
Bridge
Amplifier
Bridge
Sensor
VB(1)
VB(1)
VEX
NOTE: (1) VBis bias voltage within
common−mode range, dependent
on REF.
INA321
5
3
2
8
7
6
41
V+ Shutdown
VIN−
V−
VIN+
REF
INA321
5
3
2
8
7
6
41
V+ Shutdown
VIN−
V−
VIN+
REF
INA321
5
3
2
8
7
6
41
V+ Shutdown
VIN−
V−
VIN+
REF
VOUT
RG
VOUT
RG
VOUT
RG
Figure 3. Providing an Input Common-Mode Path
When differential source impedance is low, the bias
current return path can be connected to one input. With
higher source impedance, two equal resistors will provide
a balanced input. The advantages are lower input offset
voltage due to bias current flowing through the source
impedance and better high-frequency gain.
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12
OUTPUT BUFFERING
The INA321 is optimized for a load impedance of 10kΩ or
greater. For higher output current the INA321 can be
buffered using the OPA340, as shown in Figure 4. The
OPA340 can swing within 50mV of the supply rail, driving
a 600Ω load. The OPA340 is available in the tiny MSOP-8
package.
OPA340 VOUT
+5V
0.1µF
0.1µF
INA321
5
3
2
VOUT
8
7
6
41
V+ Shutdown
RG
VIN−
V−
VIN+
REF
Figure 4. Output Buffering Circuit. Able to drive
loads as low as 600Ω.
SHUTDOWN MODE
The shutdown pin of the INA321 is nominally connected to
V+. When the pin is pulled below 0.8V on a 5V supply, the
INA321 goes into sleep mode within nanoseconds. For
actual shutdown threshold, see the Typical Characteristic
curve, Shutdown Voltage vs Supply V oltage. Drawing less
than 1µA of current, and returning from sleep mode in
microseconds, the shutdown feature is useful for portable
applications. Once in sleep-mode, the amplifier has high
output impedance, making the INA321 suitable for
multiplexing.
RAIL-TO-RAIL OUTPUT
A class AB output stage with common-source transistors
is used to achieve rail-to-rail output for gains of 10 or
greater. For resistive loads greater than 25kΩ, the output
voltage can swing to within a few millivolts of the supply rail
while maintaining low gain error. For heavier loads and
over temperature, see the Typical Characteristic curve,
Output Voltage Swing vs Output Current. The INA321’s
low output impedance at high frequencies makes it
suitable for directly driving Capacitive Digital-to-Analog
(CDAC) input A/D converters, as shown in Figure 5.
ADS7818
or
ADS7822
12−Bits
+5V
INA321
5
3
2
VOUT
8
7
6
41
V+ Shutdown
RG
VIN−
V−
VIN+
REF
fS<100kHz
Figure 5. INA321 Directly Drives a
Capacitive-Input, A/D Converter
OFFSET TRIMMING
The INA321 is laser-trimmed for low offset voltage. In the
event that external offset adjustment is required, the of fset
can be adjusted by applying a correction voltage to the
reference terminal. Figure 6 shows an optional circuit for
trimming offset voltage. The voltage applied to the REF
terminal is added to the output signal. The gain from REF
to VOUT is +1. An op-amp buffer is used to provide low
impedance at the REF terminal to preserve good
common-mode rejection.
OPA336 Adjustable
Voltage
INA321
5
3
2
VOUT
8
7
6
41
V+ Shutdown
RG
VIN−
V−
VIN+
REF(1)
NOTE: (1) REF should be adjusted for the desired output level.
The value of REF affects the common−mode input range.
Figure 6. Optional Offset Trimming Voltage
"#$
#"#$
SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006
www.ti.com
13
INPUT PROTECTION
Device inputs are protected by ESD diodes that will
conduct if the input voltages exceed the power supplies by
more than 500mV. Momentary voltages greater than
500mV beyond the power supply can be tolerated if the
current through the input pins is limited to 10mA. This is
easily accomplished with input resistor RLIM, as shown in
Figure 7. Many input signals are inherently current-limited
to less than 10mA; therefore, a limiting resistor is not
required.
RLIM
RLIM
IOVERLOAD
10mA max INA321
5
3
2
VOUT
8
7
6
41
V+ Shutdown
RG
VIN−
V−
VIN+
REF
Figure 7. Input Protection
OFFSET VOLTAGE ERROR CALCULATION
The offset voltage (VOS) of the INA321E is specified at a
maximum of 500µV with a +5V power supply and the
common-mode voltage at VS/2. Additional specifications
for power-supply rejection and common-mode rejection
are provided to allow the user to easily calculate
worst-case expected offset under the conditions of a given
application.
Power-Supply Rejection Ratio (PSRR) is specified in
µV/V. For the INA321, worst-case PSRR is 200µV/V,
which means for each volt of change in power supply, the
offset may shift up to 200µV. Common-Mode Rejection
Ratio (CMRR) is specified in dB, which can be converted
to µV/V using the following equation:
CMRR (in µV/V) = 10[(CMRR in dB)/—20] • 106
For the INA321, the worst-case CMRR over the specified
common-mode range is 90dB (at G = 25) or about 30µV/V.
This means that for every volt of change in common-mode,
the offset will shift less than 30µV.
These numbers can be used to calculate excursions from
the specified offset voltage under different application
conditions. For example, an application might configure
the amplifier with a 3.3V supply with 1V common-mode.
This configuration varies from the specified configuration,
representing a 1.7V variation in power supply (5V in the
offset specification versus 3.3V in the application) and a
0.65V variation in common-mode voltage from the
specified VS/2.
Calculation of the worst-case expected offset would be as
follows:
Adjusted VOS = Maximum specified VOS +
(power-supply variation) • PSRR +
(common-mode variation) • CMRR
VOS = 0.5mV + (1.7V • 200µV) + (0.65V • 30µV)
= ±0.860mV
However, the typical value will be smaller, as seen in the
Typical Characteristics.
FEEDBACK CAPACITOR IMPROVES RESPONSE
For optimum settling time and stability with
high-impedance feedback networks, it may be necessary
to add a feedback capacitor across the feedback resistor,
RF, as shown in Figure 8. This capacitor compensates for
the zero created by the feedback network impedance and
the INA321’s RG-pin input capacitance (and any parasitic
layout capacitance). The effect becomes more significant
with higher impedance networks. Also, RX and CL can be
added to reduce high-frequency noise.
INA321
V+
VOUT
RIN
RIN •CIN =R
F•CF
RF
RX
CL
CIN
Where CIN is equal to the INA321 input capacitance
(approximately 3pF) plus any parastic layout capacitance.
5
3
2
8
7
6
4
1
Shutdown
RG
VIN−
V−
VIN+
REF
CF
Figure 8. Feedback Capacitor Improves Dynamic
Performance
It is suggested that a variable capacitor be used for the
feedback capacitor since input capacitance may vary
between instrumentation amplifiers, and layout
capacitance is difficult to determine. For the circuit shown
in Figure 8, the value of the variable feedback capacitor
should be chosen by the following equation:
RIN • CIN = RF • CF
where CIN is equal to the INA321’s RG-pin input
capacitance (typically 3pF) plus the layout capacitance.
The capacitor can be varied until optimum performance is
obtained.
"#$
#"#$
SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006
www.ti.com
14
APPLICATION CIRCUITS
Medical ECG Applications
Figure 9 shows the INA321 configured to serve as a
low-cost ECG amplifier, suitable for moderate accuracy
heart-rate applications such as fitness equipment. The
input signals are obtained from the left and right arms of the
patient. The common-mode voltage is set by two 2MΩ
resistors. This potential, through a buffer, provides an
optional right leg drive. Filtering can be modified to suit
application needs by changing the capacitor value of the
output filter.
Low-Power, Single-Supply Data Acquisition
Systems
Refer to Figure 5 to see the INA321 configured to drive an
ADS7818. Functioning at frequencies of up to 500kHz, the
INA321 is ideal for low-power data acquisition.
OPA336
OPA336
OPA336
Right Arm
Left Arm
OPA336
1MΩ
REF
1MΩ
1MΩ
10kΩ
10kΩ
Shield
Drive 390kΩ
10kΩ
2kΩ
2kΩ
1.6nF
0.1µF
100kΩ
100kΩ
Shield
+5V
VR
VR
VR=+2.5V
2MΩ2MΩ
Right
Leg
VR
INA321
5
3
2
8
7
6
41
V+ Shutdown
RG
VIN−
V−
VIN+
VOUT PUT
100kΩ
Figure 9. Simplified ECG Circuit for Medical Applications
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
INA2321EA/250 ACTIVE TSSOP PW 14 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
INA2321EA/250G4 ACTIVE TSSOP PW 14 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
INA2321EA/2K5 ACTIVE TSSOP PW 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
INA2321EA/2K5G4 ACTIVE TSSOP PW 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
INA321E/250 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
INA321E/250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
INA321E/2K5 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
INA321E/2K5G4 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
INA321EA/250 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
INA321EA/250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
INA321EA/2K5 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
INA321EA/2K5G4 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 2
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
INA2321EA/250 TSSOP PW 14 250 180.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
INA2321EA/2K5 TSSOP PW 14 2500 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
INA321E/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA321E/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA321EA/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA321EA/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA2321EA/250 TSSOP PW 14 250 210.0 185.0 35.0
INA2321EA/2K5 TSSOP PW 14 2500 367.0 367.0 35.0
INA321E/250 VSSOP DGK 8 250 210.0 185.0 35.0
INA321E/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0
INA321EA/250 VSSOP DGK 8 250 210.0 185.0 35.0
INA321EA/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 2
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