May 1997 ML4411*/ML4411A** Sensorless Spindle Motor Controller GENERAL DESCRIPTION The ML4411A includes a comparator on the P3 output to prevent cross-conduction. The ML4411 provides complete commutation for delta or wye wound Brushless DC (BLDC) motors without the need for signals from Hall Effect Sensors. This IC senses the back EMF of the three motor windings (no neutral required) to determine the proper commutation phase angle using Phase Lock Loop techniques. This technique will commutate virtually any 3-phase BLDC motor and is insensitive to PWM noise and motor snubbing. The ML4411 is architecturally similar to the ML4410 but with improved braking and brown-out recovery circuitry. FEATURES Included in the ML4411 is the circuitry necessary for a Hard Disk Drive microcontroller driven control loop. The ML4411 controls motor current with either a constant off-time PWM or linear current control driven by the microcontroller. Braking and Power Fail are also included in the ML4411. The timing of the start-up sequencing is determined by the micro, allowing the system to be optimized for a wide range of motors and inertial loads. The ML4411 modulates the gates of external N-Channel power MOSFETs to regulate the motor current. The IC drives P-Channel MOSFETs directly. Back-EMF commutation provides maximum torque for minimum "spin-up" time for spindle motors Accurate, jitter-free phase locked motor speed feedback output Linear or PWM motor current control Easy microcontroller interface for optimized start-up sequencing and speed control Power fail detect circuit with delayed braking Drives external N-channel FETs and P-channel FETs Back-EMF comparator detects motor rotation after power fail for fast re-lock after brownout * This Product Is Obsolete ** This Product Is End Of Life As Of August 1, 2000 BLOCK DIAGRAM 20 14 15 16 21 18 26 8 PH1 RC CVCO BACK-EMF SAMPLER PH2 PH3 VCO VCC2 VCO/TACH OUT RESET IRAMP 27 17 19 VCC 25 BLDC MOTOR 3 LINEAR OR PWM CURRENT CONTROL ISENSE COS PWR FAIL +5 4 N1-3 6 DIS PWR ILIMIT POWER DRIVERS GATE DRIVE CBRK 28 24 3 ENABLE E/A ICMD 23 P1-3 LOGIC AND CONTROL BRAKE 22 POWER FAIL DETECT COTA 7 12 PATENTED 13 6 GND 1 1 ML4411/ML4411A PIN CONFIGURATION ML4411 28-Pin SOIC (S28W) GND 1 28 ICMD P1 2 27 ILIMIT P2 3 26 BRAKE VCC2 4 25 VCC P3 5 24 PH3 COTA 6 23 PH2 CBRK 7 22 PH1 DIS PWR 8 21 IRAMP N1 9 20 RC N2 10 19 +5V N3 11 18 ENABLE E/A ISENSE 12 17 PWR FAIL COS 13 16 RESET CVCO 14 15 VCO/TACH OUT TOP VIEW PIN DESCRIPTION PIN NAME FUNCTION PIN NAME FUNCTION 1 GND Signal and Power Ground 16 RESET 2 P1 Drives the external P-channel transistor driving motor PH1 Input which holds VCO off and sets the IC to the RESET condition 17 PWR FAIL A "0" output indicates 5V or 12V is under-voltage. This is an open collector output with a 4.5ky pull-up to +5V 3 P2 Drives the external P-channel transistor driving motor PH2 4 VCC2 12V power and power for the braking function 5 P3 Drives the external P-channel transistor driving motor PH3 6 COTA Compensation capacitor for linear motor current amplifier loop 7 CBRK Capacitor which stores energy to charge N-channel MOSFETs for braking with power off. 8 DIS PWR A logic 0 on this pin turns off the N and P outputs and causes the TACH comparator output to appear on TACH OUT 9-11 N1, N2 N3 Drives the external N-channel MOSFETs for PH1, PH2, PH3 18 ENABLE E/A A "1" logic input enables the error amplifier and closes the back-EMF feedback loop 19 +5V 5V power supply input 20 RC VCO loop filter components 21 IRAMP Current into this pin sets the initial acceleration rate of the VCO during start-up 22 PH1 Motor Terminal 1 23 PH2 Motor Terminal 2 24 PH3 Motor Terminal 3 25 VCC 12V power supply. Terminal which is sensed for power fail 12 ISENSE Motor current sense input 26 BRAKE A "0" activates the braking circuit 13 COS Timing capacitor for fixed off-time PWM current control 27 ILIMIT Sets the threshold for the PWM comparator 14 CVCO Timing capacitor for VCO 28 ICMD Current Command for Linear Current amplifier 15 VCO/TACH Logic Output from VCO or TACH OUT comparator 2 ML4411/ML4411A ABSOLUTE MAXIMUM RATINGS OPERATING CONDITIONS Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. Temperature Range ........................................ 0C to 70C VCC Voltage +12V (pin 25) ........................... 12V 10% +5V (pin 19) ................................................ 5V 10% I(RAMP) current (Pin 21) ................................. 0 to 100A I Control Voltage Range (pins 27, 28) ................ 0V to 7V Supply Voltage (pins 4, 25) ........................................ 14V Output Current (pins 2, 3, 5, 9,10,11) ................. 150mA Logic Inputs (pins 16, 17, 18, 25) .................... -0.3 to 7V Junction Temperature ............................................ 150C Storage Temperature Range ..................... -65C to 150C Lead Temperature (Soldering 10 sec.) .................... 150C Thermal Resistance (qJA) ...................................... 60C/W ELECTRICAL CHARACTERISTICS Unless otherwise specified, TA = Operating Temperature Range, VCC = VCC2 = 12V, RSENSE = 1y, COTA = CVCO = 0.01F, COS = 0.02F PARAMETER CONDITIONS MIN TYP MAX UNITS Oscillator (VCO) Section (VPIN16 = 5V) Frequency vs. VPIN 20 1V - VPIN20 - 10V Frequency VVCO = 6V 300 Hz/V 1450 1800 2150 Hz 70 140 210 Hz Mode = 0 125 250 mV VRC State R 125 250 mV IRC VPIN18 = 0V, RRAMP = 39ky 70 100 130 A VPIN18 = 5V, State A, VPH2 = 4V 30 50 90 A VPIN18 = 5V, State A, VPH2 = 6V -13 2 13 A VPIN18 = 5V, State A, VPH2 = 8V -30 -50 -90 A RPIN21 = 39ky to +5V 1.0 1.1 1.20 V VPIN27 = 5V, 0V - VPIN28 - 2.5V 4.5 5 5.5 V/V 12 25 33 s VVCO = 0.5V Reset Voltage at CVCO Sampling Amplifier (Note 1) VPIN21 Motor Current Control Section ISENSE Gain One Shot Off Time ICMD Transconductance Gain ICMD, ILIM Bias Current 0.19 VIN = 0 mmho 0 -100 -400 nA 9.1 9.8 10.5 V Power Fail Detection Circuit 12V Threshold Hysteresis 150 5V Threshold 3.8 Hysteresis 4.25 mV 4.5 70 V mV Logic Inputs Voltage High (VIH) 2 V Voltage Low (VIL) 0.8 V Current High (IIH) VIN = 2.7V -10 1 10 A Current Low (IIL) VIN = 0.4V -500 -350 -200 A 3 ML4411/ML4411A ELECTRICAL CHARACTERISTICS (Continued) PARAMETER CONDITIONS MIN TYP MAX UNITS 0.8 1.2 1.6 V 0.3 1 A 0.06 10 nA 20 85 A 19.5 mA Braking Circuit (VPIN17 = 0V) Brake Active Threshold PIN 26 Bias Current VPIN26 = 0V N-Channel Leakage VCC, VCC2 = 0V VPIN17 = 0V, VN = 4V CBRK Current VCC, VCC2 = 0V, VPIN26 = 3V VPIN7 = 6V 0 Outputs (ICMD = ILIMIT = 2.5V) IP Low VP High VP = 0.8V 5 7 VP = 0.4V 2 4 IP = -10A VCC - 0.4 P3 Comparator Threshold V VCC2 - 1.6 VN High VPIN12 = 0V VN Low IN = 1mA LOGIC Low (VOL) IOUT = 0.4mA VCO/TACH VOH IOUT = -100A POWER FAIL VOH IOUT = -10A VCC2 - 3.2 mA VCC2 - 0.8 V 10 VCC - 1.2 V 0.2 0.7 V 0.5 V 2.4 V VPIN19 - 0.2 VPIN19 - 0.1 VPIN19 V Supply Currents (N and P Outputs Open) 5V Current 3 4 mA VCC Current 38 50 mA 2 3 mA 2.6 3.75 mA VCC2 Current ML4411 VCC2 Current ML4411A Note 1. For explanation of states, see Figure 5 and Table 1. 4 ML4411/ML4411A FUNCTIONAL DESCRIPTION The ML4411 provides closed-loop commutation for 3-phase brushless motors. To accomplish this task, a VCO, integrating Back-EMF Sampling error amplifier and sequencer form a phase-locked loop, locking the VCO to the back-EMF of the motor. The IC also contains circuitry to control motor current with either linear or constant offtime PWM modes. Braking and power fail detection functions are also provided on chip. The ML4411 is designed to drive external power transistors (N-channel sinking transistors and PNP sourcing transistors) directly. maximum voltage at any PH input does not exceed VCC. NEUTRAL Start-up sequencing and motor speed control are accomplished by a microcontroller. Speed sensing is accomplished by monitoring the output of the VCO, which will be a signal which is phased-locked to the commutation frequency of the motor. 0 BACK-EMF SENSING AND COMMUTATOR The ML4411 contains a patented back-EMF sensing circuit which samples the phase which is not energized (Shaded area in figure 2) to determine whether to increase or decrease the commutator (VCO) frequency. A late commutation causes the error amplifier to charge the filter (RC) on pin 20, increasing the VCO input while early commutation causes pin 20 discharge. Analog speed control loops can use pin 20 as a speed feedback voltage. 60 120 180 240 300 0 Figure 2. Typical motor phase waveform with Back-EMF superimposed (Ideal Commutation) VCO AND PHASE DETECTOR CALCULATIONS The VCO should be set so that at the maximum frequency of operation (the running speed of the motor) the VCO control voltage will be no higher than VCCMIN - 1V. The VCO maximum frequency will be: FMAX = 0.05 x POLES x RPM The input impedance of the three PH inputs is about 8Ky to GND. When operating with a higher voltage motor, the PH inputs should be divided down in voltage so that the where POLES is the number of poles on the motor and RPM is the maximum motor speed in Revolutions Per ROTATION SENSE + - A NEUTRAL SIMULATOR B A + B + C 6 C + IRC = Va - Vb 8K I(PIN 21) a SIGN CHANGER 8K b + LOOP FILTER RC - R MULTIPLEXER C1 C2 COMMUTATION LOGIC 8K VCO VCO /TACH OUT DIS PWR FIGURE 1. BACK EMKF sensing block diagram 5 Minute. ML4411/ML4411A The minimum VCO gain derived from the specification table (using the minimum Fvco at VVCO = 6V) is: K VCO(MIN) START-UP SEQUENCING -6 = 2.42 x 10 C VCO When the motor is initially at rest, it is generating no back-EMF. Because a back-EMF signal is required for closed loop commutation, the motor must be started "open-loop" until a velocity sufficient to generate some back-EMF is attained (around 100 RPM). The following steps are a typical procedure for starting a motor which is at rest. Assuming that the VVCO(MAX) = 9.5V, then -6 C VCO = 9.5 x 2.42 x 10 FMAX or C VCO Step 1: The IC is held in reset (state R) with full power applied to the windings (see figure 6). This aligns the rotor to a position which is 30 (electrical) before the center of the first commutation state. 460 = F POLES x RPM 3000 Step 2: Reset is released, and a fixed current is input to pin 21 and appears as a current on pin 20, and will ramp the VCO input voltage, accelerating the motor at a fixed rate. FREQUENCY (Hz) 2500 2000 0.01F 1500 Step 3: When the motor speed reaches about 100 RPM, the back EMF loop can be closed by pulling pin 18 high. 0.02F 1000 0 0 2 4 6 8 10 12 VVCO (VOLTS) Figure 3. VCO Output Frequency vs. VVCO (Pin 20) Figure 4 shows the transfer function of the Phase Lock Loop with the phase detector formed from the sampled phase through the Gm amplifier with the loop filtered formed by R, C1, and C2. The impedance of the loop filter is VCO FREQUENCY 500 RESET/ ALIGN P1, P3, N2 ON CLOSED LOOP 0 RESET ENABLE E/A (s + LEAD ) ZRC (s) = 1 C1s (s + LAG ) Figure 6. Typical Start-up Sequence. Using this technique, some reverse rotation is possible. The maximum amount of reverse rotation is 360/N, where N is the number of poles. For an 8 pole motor, 45 reverse rotation is possible. Gm = 1.25 x 10-4 + SAMPLED PHASE OPEN-LOOP (STEPPING) RC ZRC - R For quick recovery following a momentary power failure, the following steps can be taken: C1 C2 FOUT VCO STEP PIN 16 PIN 18 PIN 21 I LIMIT ICMD KVCO(HZ/V) 1 0 0 FIXED IMAX 2 1 0 FIXED IMAX 3 1 1 0 IMAX Figure 4. Back EMF Phase Lock Loop Components Where the lead and lag frequencies are set by: LEAD = LAG = 6 1 R C2 C1 + C 2 R C1 C 2 Table 2. Start-up Sequence. ML4411/ML4411A STATE N1 N2 N3 OUTPUTS P1 P2 P3 INPUT SAMPLING R OR 0 OFF ON OFF ON OFF ON N/A A OFF OFF ON ON OFF OFF PH2 B OFF OFF ON OFF ON OFF PH1 C ON OFF OFF OFF ON OFF PH3 D ON OFF OFF OFF OFF ON PH2 E OFF ON OFF OFF OFF ON PH1 F OFF ON OFF ON OFF OFF PH3 Table 1. Commutation States. RESET 4.3 V CVCO 2.3 V VCO OUT STATE R 0 A B C D E F A Figure 5. Commutation Timing and Sequencing. Step 1a: The IC is held in reset (state R) with ICMD low and DIS PWR low. The Micro Processor monitors the VCO/ TACH OUT pin to determine if a signal is present. If a signal is present, the frequency is determined (by measuring the period). If a signal is not present, proceed to the routine described above for starting a motor which is a rest. Step 2a: Release RESET and DIS PWR. Apply a current to pin 21 and monitor the VCO/TACH OUT pin for VCO frequency. Step 3a: When the VCO frequency approaches 6 X the motor frequency (or where the motor frequency has decelerated to by coasting during the time the VCO frequency was ramping up) the back EMF loop can be closed by pulling pin 18 high and motor current brought up with ICMD or ILIMIT. ADJUSTING OPEN LOOP STEP RATE IRAMP should be set so that the VCO's frequency ramp during "open loop stepping" phase of motor starting is less than the motor's acceleration rate. In other words, the motor must be able to keep up with the VCO's ramp rate in open loop stepping mode. The VCO's input voltage (VPIN 20) ramp rate is given by: dVVCO I RAMP dt C1 + C2 since FVCO = K VCO x VVCO -6 K VCO(MAX) = 4 x 10 C VCO then combining the 3 equations IRAMP can be calculated from the desired maximum open loop stepping rate the motor can follow. IRAMP< dFVCO CVCO x (C1 + C2) 6 dt 4 x 10- 7 ML4411/ML4411A The tolerance of the open loop step VCO acceleration dFVCO dt depends on the tolerances of KVCO, IRAMP, C1, C2, and CVCO. For more optimum spin up times, these variables can be digitally "calibrated" out by the microprocessor using the following procedure: 1. Reset the IC by holding pin 16 low for at least 5s. 2. Go into open loop step mode with no current on the motor and measure the difference between the first two complete VCO periods with the PWM signal at 50% duty cycle: ENABLE E/A = (see below) ICMD = 0V PWM OUT = 50% MicroP IN I(RAMP) VCO/TACH OUT Figure 7. Auto-Calibration of Open-Loop Step Rate. 3. Compute a correction factor to adjust IRAMP current by changing the PWM duty cycle from the Micro (D.C.) DC . .(NEW) = 50% x FVCO (DESIRED) FVCO (MEASURED) 4. Use new computed duty cycle for open loop stepping mode and proceed with a normal start-up sequence. If this auto calibration is used ENABLE E/A can be tied permanently high, eliminating a line from the Micro. Since there is offset associated with the Phase Detector Error Amp (E/A), more current than is being injected by IRAMP may be taken out of pin 20 if the offset is positive (into pin 20) if the error amp were enabled during the open loop stepping mode. In that case, VVCO would not rise and the motor would not step properly. The effect of E/A offset can also be canceled out by the auto calibration algorithm described above allowing the E/A to be permanently enabled. A V = 1.875 x 10 sCOTA 8 -4 To facilitate speed control, the ML4411 includes two current control loops -- linear and PWM (figure 9). The linear control loop senses the motor current on the ISENSE terminal through RSENSE. An internal current sense amplifier's (A2) output modulates the gates of the 3 Nchannel MOSFET's when OTA OUT is tied to OTA IN, or can modulate a single MOSFET gate tied to OTA OUT. When operated in this mode, OTA IN is tied to 12V, and N1-N3 are saturated switches. This method produces the lowest current ripple at the expense of an extra MOSFET. The linear current control modulates the gates of the external MOSFET drivers. Amplifier A2 is a transconductance amplifier which amplifies the difference between ICMD and ISENSE. The transconductance gain of A2 is: g m = 1.875 x 10 -4 The current loop is compensated by COTA which forms a pole given by ML4411 PWM OUT PWM AND LINEAR CURRENT CONTROL y The motor will start more consistently and tolerate a wider variation in open loop step rate if there is some damping on the motor (such as head drag) during the open loop modes. -4 P = 9.375 x 10 C OTA This time constant should be fast enough so that the current loop settles in less than 10% of TVCO at the highest motor speed to avoid torque ripple to VTH mismatch of the N-Channel MOSFETs. The ISENSE input pin should be kept below 1V. If ISENSE goes above 1V, a bias current of about -300A will flow out of pin 12 and the N outputs will be inhibited. Bringing ISENSE below 0.7V removes the bias current to its normal level. For this reason, the noise filter resistor on the ISENSE pin (1Ky on Figure 10) should be less than 1.5Ky. The noise filter time constant should be great enough to filter the leading edge current spike when the N-FETs turn on but small enough to avoid excessive phase shift in the ISENSE signal. OUTPUT DRIVERS The motor's source drivers (P1 thru P3) are open-collector NPN's with internal 16Ky pull-up resistors. N3is inhibited until P3 is within 1.4V (typ) of VCC2 on the ML4411A. Drivers N1 through N3 are totem-pole outputs capable of sourcing and sinking 10mA. Switching noise in the external MOSFETs can be reduced by adding resistance in series with the gates. ML4411/ML4411A BRAKING As shown in figure 9, the braking circuit pulls the NChannel MOSFET gates high when BRAKE falls below a 1.4V threshold. After a power failure, CDLY is discharged slowly through RDLY providing a delay for retract to occur before the braking circuit is activated. The N-Channel buffer (B1) tri-states when the BRAKE pin reaches 2.1V to ensure that no charge from CBRK is lost through the pulldown transistor in B1. To brake the motor with external signals, first disable power by pulling pin 8 low, then pull pin 26 below 1.4V using an open drain (or diode isolated) output. 60 50 TOFF (s) 40 30 20 10 0 The bias current for the Braking circuits comes from VCC2. When the N-Channel MOSFETs turn on, no additional power is generated for VCC2 (motor back-EMF rectified through out the MOSFET body diodes). After VCC2 drops below 4V, Q2 turns off. Continued braking relies on the CGS of the N-Channel MOSFETs to sustain the MOSFET gate enhancement voltage. 0 0.01 0.02 0.03 0.04 0.05 COS Figure 8. ILIMIT Output Off-Time vs. COS. VCC2 P1 . . . P3 16K + P3 ONLY A6 POWER FAIL 17 4.5K +5 - VCC2 - 3V UVLO VCC COMM. LOGIC DIS PWR VCC2 Q2 VCC2 RDLY + VCC2 26 BRAKE A5 CBRK - 2.1V + CDLY 1.4V 8 7 Q1 A4 - COMMUTATION LOGIC TRIST. DIS PWR B1 VIN UVLO N1 . . . N3 RSENSE 27 Q ILIMIT + ONE SHOT A3 28 - ICMD 13 VCC + 12 COS ISENSE AV = 5 COTA - 6 A2 A1 1K Figure 9. Current Control, Output Drive and Braking Circuits. 9 ML4411/ML4411A APPLICATIONS OUTPUT STAGE HINTS Figure 10 shows a typical application of the ML4411 in a hard disk drive spindle control. Although the timing necessary to start the motor in most applications would be generated by a microcontroller, Fig. 11 shows a simple "one shot" start-up timing approach. In the circuit in Figure 10, Q1, Q2, and Q3 are IRFR9024 or equivalent. Q4, Q5, and Q6 are IRFR024 or equivalent. New MOSFET packaging technology such as the Little Foot series may decrease the PC board space. These packages, however have much lower thermal inertia and dissipation capabilities than the larger packages, and care should be taken not to exceed their rated current and junction temperature. Speed control can be accomplished either by: 1. Sensing the VCO OUT frequency with a Microcontroller and adjusting ICMD via an analog output form the Micro (PWM DAC). Since the output section in a full bridge application consists of three half-H switches, cross-conduction can occur. Cross-conduction is the condition where an N-FET and P-FET in the same phase of the bridge conduct simultaneously. This could happen under two conditions (see figure 13): 2. Using analog circuitry for speed control. (Fig. 12). 1N5819 VCC2 +12V 10 0.1 1K 10 1K Q1 Q2 Q4 Q5 0.1 1K Q3 TO VCC 510 510 Q6 510 5K 0.5 5K +5 100pF 0.01 0.22 0.02 +12 1 GND ICMD 28 2 P1 ILIMIT 27 3 P2 BRAKE 26 4 VCC2 VCC 25 5 P3 PH3 24 6 COTA PH2 23 7 CBRK PH1 22 8 DIS PWR IRAMP 21 9 N1 RC 20 10 N2 +5V 19 11 N3 ENABLE E/A 18 12 ISENSE PWR FAIL 17 13 COS RESET 16 14 CVCO VCO/TACH OUT 15 ICOMMAND 0.22 +12 1M +5 +5 510K ENABLE ERROR AMP 0.01 RESET (FROM MICRO) POWER FAIL TO MICRO VCO OUT DISABLE POWER Figure 10. ML4411 Typical Application 10 ML4411/ML4411A +5V 4 VCC2 R1 ML4411 PIN 17 D1 C1 1/6 IC1 1/6 IC1 TO ML4411 PIN 16 - 1K 16K A6 P3 + D2 R2 INHIBIT N3 ML4411A ONLY 1/6 IC1 5 P Q2 TO ML4411 PIN 18 C2 Figure 13. Alternate cross-conduction prevention for ML4411A Figure 11. Analog Start-up Circuit In Condition 2 above, the P-Channel MOSFET is pulled up inside the ML4411 with a 16Ky resistor. If the current through C(CGp) is greater than VTH 16K when the N-FET turns on, the P-FET could turn on simultaneously, causing cross-conduction. Adding R1 as shown in Figure 14 eliminates this. The size of R1 will depend on the fall time of the phase voltage, and the size of the C(DGp). D1 may be needed for high power applications to limit the negative current pulled (through C(DGn)) out of the substrate diode in the ML4411 when P-FET turns off. - A1 TO ML4411 PIN 20 + R3 C3 R4 +12V VCC2 - R5 TO ML4411 PIN 28 A1 + R1 R6 RG(P) P C(DGp) SYMBOL A1 IC1 D1, D2 R1 R2 R3 VALUE LM358 74HC14 IN4148 1My 1My 100Ky SYMBOL R4 R5 R6 C1 C2 C3 VALUE 100Ky 50Ky 50Ky 3.3F 3.3F 0.47F Figure 12. Analog Speed Control 1. When transitioning from mode 0 to mode A (see table 1) P3 goes from on to off at the same time N3 goes from off to on. If the P3 turns off slowly and N3 turns on quickly, cross-conduction may occur. This condition has been prevented inside the IC on the ML4411A through the addition of comparator A6 on the P3 output (Figure 9). This comparator may cause an oscillation when the N3 switches on due to the capacitive coupling effect described below pulling the P3 pin below VCC2-1.4V. To avoid this, use the circuit in Figure 13. 2. When the MOSFET in the same phase switches on gate current flows due to capacitive coupling of current through the MOSFET's drain to gate capacitance. This could cause the device that was off to be turned on. C(DGn) N RG(N) D1 Figure 14. Causes of Cross-conduction Adding a series damping resistor to the N-FET gate (RGn) will slow the fall time. The damping resistor should be low enough to: Avoid turning on the N-Channel gate when the PNP turns on via the same mechanism outlined in condition 2 above Not severely increase the switching losses in the N-FET UNIPOLAR OPERATION Unipolar mode offers the potential advantage of lower motor drive cost by only requiring the use of 3 transistors to drive the motor. The ML4411 will operate in unipolar mode (Figure 15) provided the following precautions are taken: 1. The IC supplies should not exceed 12V + 10%. 2. The phase pins on the IC should not exceed the supply voltage. 11 ML4411/ML4411A 10K 10K 10K 3.3K +12 +V +12 +5 +V 1.2K 0.5 0.02 0.01 +12 1 GND ICMD 28 2 P1 ILIMIT 27 3 P2 BRAKE 26 4 VCC2 VCC 25 5 P3 PH3 24 6 COTA PH2 23 7 CBRK 8 DIS PWR +5 10K + - +5 +12 1M PH1 22 IRAMP 21 9 N1 RC 20 10 N2 +5V 19 11 N3 ENABLE E/A 18 12 ISENSE 13 COS 14 CVCO +5 PWR FAIL 17 +5 RESET 16 1M VCO/TACH OUT 15 2.2 CDLY 0.01 Figure 15. ML4411 Unipolar Drive Application In unipolar operation, the motor`s windings must be allowed to drive freely to: VF(MAX) = VSUPPLY (MAX) + VEMF (MAX) Therefore, there can be no diodes to clamp the inductive energy to VSUPPLY. This energy must be clamped, however, to avoid an over-voltage condition on the MOSFETs and other components. Typically, a VCLAMP voltage is created to provide the clamping voltage. The inductive energy may either be dissipated (Figure 16) or alternately efficiently regenerated back to the system supply (Figure 17). The circuit in Figure 15 is designed to minimize the external components necessary, at some compromise to performance. The 3 resistors from the motor phase windings to the PH inputs work with the ML4411`s 8Ky internal resistance to ground to divide the motor`s phase voltage down, providing input signals that do not exceed 12V. VCLAMP = +24V +12V 5V REG +5V 10 L1 5V REG D1 50% DUTY CYCLE 12V BATTERY 12V LDO 0.1 C1 12V LDO +12V TO VCC AND VCC2 1000 0.1 Figure 16. Dissipative Clamping Technique 12 VCLAMP = +24V 0.1 12V BATTERY 0.1 This circuit uses analog speed regulation. The 1My resistor from Pin 20 to the speed regulation op amp provides the function of injecting current into the VCO loop filter for the open loop stepping phase of start-up operation. The "one shot" circuitry to time the reset is replaced by a diode and RC delay from the rising edge or the POWERFAIL signal. The error amplifier is left enabled continuously since at low speeds its current contribution is negligible. The current injected into the loop filter must be greater than the leakage current from the phase detector amplifier for the motor to start reliably. Figure 17. Non-Dissipative Clamping Technique ML4411/ML4411A HIGHER VOLTAGE MOTOR DRIVE +V To drive a higher voltage motor, the same precautions regarding ML4411 voltage limitations as were outlined for Unipolar drive above should be followed. Figures 14-16 provide several methods of translating the ML4411`s P outputs to drive a higher voltage. Q2 Q1 Q3 +V ML4411 P +12V Q1 Figure 19. High Voltage Translation using "Composite" PNP Power Transistor Q3 ML4411 P +12V +V Figure 18. High Voltage Translation using PNP Power Transistor Q2 Q1 ML4411 P Q3 Figure 20. High Voltage Translation with NPN Darlington 13 ML4411/ML4411A PHYSICAL DIMENSIONS inches (millimeters) Package: S28 28-Pin SOIC 0.699 - 0.713 (17.75 - 18.11) 28 0.291 - 0.301 0.398 - 0.412 (7.39 - 7.65) (10.11 - 10.47) PIN 1 ID 1 0.024 - 0.034 (0.61 - 0.86) (4 PLACES) 0.050 BSC (1.27 BSC) 0.095 - 0.107 (2.41 - 2.72) 0 - 8 0.012 - 0.020 (0.30 - 0.51) 0.090 - 0.094 (2.28 - 2.39) SEATING PLANE 0.005 - 0.013 (0.13 - 0.33) 0.022 - 0.042 (0.56 - 1.07) 0.009 - 0.013 (0.22 - 0.33) ORDERING INFORMATION PART NUMBER TEMPERATURE RANGE PACKAGE ML4411CS (Obsolete) ML4411ACS (End Of Life) 0C to 70C 0C to 70C 28-Pin Wide SOIC (S28W) 28-Pin Wide SOIC (S28W) (c) Micro Linear 1997 is a registered trademark of Micro Linear Corporation Products described in this document may be covered by one or more of the following patents, U.S.: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; Japan: 2598946; 2619299. Other patents are pending. Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume any liability arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the rights of others. The circuits contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel before deciding on a particular application. 14 2092 Concourse Drive San Jose, CA 95131 Tel: 408/433-5200 Fax: 408/432-0295 DS4411-01