Document Number: 91216 www.vishay.com
S-81274-Rev. A, 16-Jun-08 1
Power MOSFET
IRFP264N, SiHFP264N
Vishay Siliconix
FEATURES
Advanced Process Technology
Dynamic dV/dt Rating
175 °C Operating Temperature
Fast Switching
Fully Avalanche Rated
Ease of Paralleling
Simple Drive Requirements
Lead (Pb)-free Available
DESCRIPTION
Fifth generation Power MOSFETs from Vishay utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
Power MOSFETs are well know for, provides the designer
with an ectremely efficient and reliable device for use in a
wide variety of applications.
The TO-247 package is preferred for commercial-industrial
applications where higher power levels preclude the use of
TO-220 devices. The TO-247 is similar but superior to the
earlier TO-218 package because of its isolated mounting
hole.
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 1.7 mH, RG = 25 Ω, IAS = 25 A, VGS = 10 V (see fig. 12).
c. ISD 25 A, dI/dt 500 A/µs, VDD VDS, TJ 175 °C.
d. 1.6 mm from case.
PRODUCT SUMMARY
VDS (V) 250
RDS(on) (Ω)V
GS = 10 V 0.060
Qg (Max.) (nC) 210
Qgs (nC) 34
Qgd (nC) 94
Configuration Single
N-Channel MOSFET
G
D
S
TO-247
GD
S
Available
RoHS*
COMPLIANT
ORDERING INFORMATION
Package TO-247
Lead (Pb)-free IRFP264NPbF
SiHFP264N-E3
SnPb IRFP264N
SiHFP264N
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage VDS 250 V
Gate-Source Voltage VGS ± 20
Continuous Drain Current VGS at 10 V TC = 25 °C ID
44
ATC = 100 °C 31
Pulsed Drain CurrentaIDM 170
Linear Derating Factor 2.6 W/°C
Single Pulse Avalanche EnergybEAS 520 mJ
Repetitive Avalanche CurrentaIAR 25 A
Repetitive Avalanche EnergyaEAR 38 mJ
Maximum Power Dissipation TC = 25 °C PD380 W
Peak Diode Recovery dV/dtcdV/dt 8.7 V/ns
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 175 °C
Soldering Recommendations (Peak Temperature) for 10 s 300d
Mounting Torque 6-32 or M3 screw 10 lbf · in
1.1 N · m
* Pb containing terminations are not RoHS compliant, exemptions may apply
www.vishay.com Document Number: 91216
2S-81274-Rev. A, 16-Jun-08
IRFP264N, SiHFP264N
Vishay Siliconix
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 300 µs; duty cycle 2 %.
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient RthJA -40
°C/WCase-to-Sink, Flat, Greased Surface RthCS 0.24 -
Maximum Junction-to-Case (Drain) RthJC -0.39
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 µA 250 - - V
VDS Temperature Coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.30 - V/°C
Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 µA 2.0 - 4.0 V
Gate-Source Leakage IGSS V
GS = ± 20 V - - ± 100 nA
Zero Gate Voltage Drain Current IDSS
VDS = 250 V, VGS = 0 V - - 25 µA
VDS = 200 V, VGS = 0 V, TJ = 150 °C - - 250
Drain-Source On-State Resistance RDS(on) V
GS = 10 V ID = 25 Ab--0.060
Ω
Forward Transconductance gfs VDS = 25 V, ID = 25 Ab29 - - S
Dynamic
Input Capacitance Ciss VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
- 3860 -
pFOutput Capacitance Coss - 480 -
Reverse Transfer Capacitance Crss - 110 -
Total Gate Charge Qg
VGS = 10 V ID = 25 A, VDS = 200 V,
see fig. 6 and 13
- - 210
nC Gate-Source Charge Qgs --34
Gate-Drain Charge Qgd --94
Turn-On Delay Time td(on)
VDD = 30 V, ID = 25 A ,
RG = 1.8 Ω, VGS = 10 V, see fig. 10b
-17-
ns
Rise Time tr -62-
Turn-Off Delay Time td(off) -52-
Fall Time tf -53-
Internal Drain Inductance LD Between lead,
6 mm (0.25") from
package and center of
die contact
-5.0-
nH
Internal Source Inductance LS-13-
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current ISMOSFET symbol
showing the
integral reverse
p - n junction diode
--44
A
Pulsed Diode Forward CurrentaISM - - 170
Body Diode Voltage VSD TJ = 25 °C, IS = 25 A, VGS = 0 Vb--1.3V
Body Diode Reverse Recovery Time trr TJ = 25 °C, IF = 25 A, dI/dt = 100 A/µsb- 270 400 ns
Body Diode Reverse Recovery Charge Qrr -2.74.1µC
Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
D
S
G
S
D
G
Document Number: 91216 www.vishay.com
S-81274-Rev. A, 16-Jun-08 3
IRFP264N, SiHFP264N
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics
Fig. 2 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
1
10
100
1000
0.1 1 10 100
20μs PULSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
1
10
100
1000
1 10 100
20μs PULSE WIDTH
T = 175 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
1
10
100
1000
4.0 5.0 6.0 7.0 8.0 9.0 10.0
V = 50V
20μs PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 175 C
J°
-60 -40 -20 020 40 60 80 100 120 140 160 180
0.0
1.0
2.0
3.0
4.0
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
42A
www.vishay.com Document Number: 91216
4S-81274-Rev. A, 16-Jun-08
IRFP264N, SiHFP264N
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
110 100 1000
VDS, Drain-to-Source Voltage (V)
0
2000
4000
6000
8000
C,Capacitance(pF)
Coss
Crss
Ciss
VGS
= 0V, f = 1 MHZ
Ciss
= C
gs + C
gd, C
ds SHORTED
Crss = C
gd
Coss
= C
ds
+ C
gd
040 80 120 160 200
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
25A
V = 50V
DS
V = 125V
DS
V = 200V
DS
0.1
1
10
100
1000
0.2 0.4 0.6 0.8 1.0 1.2
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J°
T = 175 C
J°
1 10 100 1000 10000
VDS , Drain-toSource Voltage (V)
0.1
1
10
100
1000
ID,Drain-to-SourceCurrent(A)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100μsec
Document Number: 91216 www.vishay.com
S-81274-Rev. A, 16-Jun-08 5
IRFP264N, SiHFP264N
Vishay Siliconix
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10a - Switching Time Test Circuit
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
25 50 75 100 125 150 175
0
10
20
30
40
50
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
Pulse width 1 µs
Duty factor 0.1 %
RD
VGS
RG
D.U.T.
10 V
+
-
VDS
VDD
VDS
90 %
10 %
VGS
td(on) trtd(off) tf
0.001
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
A
RG
IAS
0.01 Ω
tp
D.U.T
L
VDS
+
-VDD
Driver
15 V
20 VIAS
VDS
tp
www.vishay.com Document Number: 91216
6S-81274-Rev. A, 16-Jun-08
IRFP264N, SiHFP264N
Vishay Siliconix
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
25 50 75 100 125 150 175
0
200
400
600
800
1000
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
10A
18A
25A
QGS QGD
QG
V
G
Charge
VGS
D.U.T.
3 mA
VGS
VDS
IGID
0.3 µF
0.2 µF
50 kΩ
12 V
Current regulator
Current sampling resistors
Same type as D.U.T.
+
-
Document Number: 91216 www.vishay.com
S-81274-Rev. A, 16-Jun-08 7
IRFP264N, SiHFP264N
Vishay Siliconix
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see htt p://www.vishay.com/ppg?91216.
P.W.Period
dI/dt
Diode recovery
dV/dt
Ripple 5 %
Body diode forward drop
Re-applied
voltage
Reverse
recovery
current
Body diode forward
current
V
GS
= 10 V*
V
DD
I
SD
Driver gate drive
D.U.T. I
SD
waveform
D.U.T. V
DS
waveform
Inductor current
D = P.W.
Period
+
-
+
+
+
-
-
-
* VGS = 5 V for logic level devices
Peak Diode Recovery dV/dt Test Circuit
RG
VDD
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
D.U.T Circuit layout considerations
Low stray inductance
Ground plane
Low leakage inductance
current transformer
Document Number: 91000 www.vishay.com
Revision: 18-Jul-08 1
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