PD - 97213C IRFB3207ZPbF IRFS3207ZPbF IRFSL3207ZPbF Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits HEXFET(R) Power MOSFET D G Benefits l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability S VDSS RDS(on) typ. max. ID (Silicon Limited) ID (Package Limited) D 75V 3.3m: 4.1m: 170Ac 120A D D S G S S D G G D2Pak IRFS3207ZPbF TO-220AB IRFB3207ZPbF D TO-262 IRFSL3207ZPbF G D S Gate Drain Source Absolute Maximum Ratings Symbol Parameter Max. ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) 170c 120c Units ID @ TC = 100C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) IDM Pulsed Drain Current d 670 Maximum Power Dissipation 300 W W/C V PD @TC = 25C A 120 Linear Derating Factor 2.0 VGS Gate-to-Source Voltage 20 dv/dt TJ Peak Diode Recovery f 16 Operating Junction and -55 to + 175 TSTG Storage Temperature Range V/ns C 300 Soldering Temperature, for 10 seconds (1.6mm from case) 10lbxin (1.1Nxm) Mounting torque, 6-32 or M3 screw Avalanche Characteristics EAS (Thermally limited) Single Pulse Avalanche Energy e IAR Avalanche Currentd EAR Repetitive Avalanche Energy g 170 mJ See Fig. 14, 15, 22a, 22b A mJ Thermal Resistance Symbol Parameter Typ. Max. Junction-to-Case k --- 0.50 RCS Case-to-Sink, Flat Greased Surface , TO-220 0.50 --- RJA RJA Junction-to-Ambient, TO-220 k --- --- 62 40 RJC www.irf.com 2 Junction-to-Ambient (PCB Mount) , D Pak jk Units C/W 1 04/07/08 IRFB/S/SL3207ZPbF Static @ TJ = 25C (unless otherwise specified) Symbol Parameter V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage RG(int) IDSS Internal Gate Resistance Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units 75 --- --- 2.0 --- 0.091 3.3 --- --- --- 4.1 4.0 --- 0.80 --- --- --- --- --- 20 250 100 -100 --- --- --- --- Conditions V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 5mAd m VGS = 10V, ID = 75A g V VDS = VGS, ID = 150A A nA VDS = 75V, VGS = 0V VDS = 75V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V Dynamic @ TJ = 25C (unless otherwise specified) Symbol gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR) Parameter Min. Typ. Max. Units Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 280 --- --- --- --- --- --- --- --- --- --- --- Effective Output Capacitance (Energy Related)i --- --- Effective Output Capacitance (Time Related)h --- 120 27 33 87 20 68 55 68 6920 600 270 770 960 --- 170 --- --- --- --- --- --- --- --- --- --- --- --- S nC ns pF Conditions VDS = 50V, ID = 75A ID = 75A VDS = 38V VGS = 10V g ID = 75A, VDS =0V, VGS = 10V VDD = 49V ID = 75A RG = 2.7 VGS = 10V g VGS = 0V VDS = 50V = 1.0MHz VGS = 0V, VDS = 0V to 60V j VGS = 0V, VDS = 0V to 60V h Diode Characteristics Symbol IS Parameter Continuous Source Current VSD trr (Body Diode) Pulsed Source Current (Body Diode)di Diode Forward Voltage Reverse Recovery Time Qrr Reverse Recovery Charge IRRM ton Reverse Recovery Current Forward Turn-On Time ISM Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 120A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25C, L = 0.033mH RG = 25, IAS = 102A, VGS =10V. Part not recommended for use above this value. 2 Min. Typ. Max. Units --- --- --- 170c --- 670 A Conditions MOSFET symbol showing the integral reverse D G p-n junction diode. TJ = 25C, IS = 75A, VGS = 0V g TJ = 25C VR = 64V, TJ = 125C IF = 75A di/dt = 100A/s g TJ = 25C S --- --- 1.3 V --- 36 54 ns --- 41 62 --- 50 75 nC TJ = 125C --- 67 100 --- 2.4 --- A TJ = 25C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) ISD 75A, di/dt 1730A/s, VDD V(BR)DSS, TJ 175C. Pulse width 400s; duty cycle 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. When mounted on 1" square PCB (FR-4 or G-10 Material). For recom mended footprint and soldering techniques refer to application note #AN-994. R is measured at TJ approximately 90C. www.irf.com IRFB/S/SL3207ZPbF 1000 1000 BOTTOM VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP 100 BOTTOM 4.5V 100 4.5V 60s PULSE WIDTH 60s PULSE WIDTH Tj = 175C Tj = 25C 10 10 0.1 1 10 100 0.1 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 100 2.5 100 RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) 10 Fig 2. Typical Output Characteristics 1000 T J = 175C T J = 25C 10 1 VDS = 25V 60s PULSE WIDTH ID = 75A VGS = 10V 2.0 1.5 1.0 0.5 0.1 2 3 4 5 6 -60 -40 -20 0 20 40 60 80 100120140160180 7 T J , Junction Temperature (C) VGS, Gate-to-Source Voltage (V) Fig 4. Normalized On-Resistance vs. Temperature Fig 3. Typical Transfer Characteristics 100000 12.0 VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss = C gd VGS, Gate-to-Source Voltage (V) ID= 75A Coss = Cds + Cgd C, Capacitance (pF) 1 V DS, Drain-to-Source Voltage (V) 10000 Ciss Coss 1000 Crss 10.0 VDS= 60V VDS= 38V VDS= 15V 8.0 6.0 4.0 2.0 0.0 100 1 10 100 VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage www.irf.com 0 20 40 60 80 100 120 140 QG, Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 IRFB/S/SL3207ZPbF 10000 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 T J = 175C 100 T J = 25C 10 1 OPERATION IN THIS AREA LIMITED BY R DS(on) 1000 100sec 100 1msec 10msec 10 DC 1 Tc = 25C Tj = 175C Single Pulse VGS = 0V 0.1 0.1 0.0 0.5 1.0 1.5 2.0 1 2.5 Limited By Package ID, Drain Current (A) 140 120 100 80 60 40 20 0 50 75 100 125 150 175 V(BR)DSS , Drain-to-Source Breakdown Voltage (V) 180 25 100 Id = 5mA 95 90 85 80 75 70 -60 -40 -20 0 20 40 60 80 100120140160180 T C , Case Temperature (C) T J , Temperature ( C ) Fig 10. Drain-to-Source Breakdown Voltage Fig 9. Maximum Drain Current vs. Case Temperature 2.5 EAS , Single Pulse Avalanche Energy (mJ) 700 2.0 Energy (J) 1.5 1.0 0.5 0.0 ID 17A 30A BOTTOM 102A 600 TOP 500 400 300 200 100 0 -10 0 10 20 30 40 50 60 70 80 VDS, Drain-to-Source Voltage (V) Fig 11. Typical COSS Stored Energy 4 100 Fig 8. Maximum Safe Operating Area Fig 7. Typical Source-Drain Diode Forward Voltage 160 10 VDS, Drain-to-Source Voltage (V) VSD, Source-to-Drain Voltage (V) 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C) Fig 12. Maximum Avalanche Energy vs. DrainCurrent www.irf.com IRFB/S/SL3207ZPbF Thermal Response ( Z thJC ) 1 D = 0.50 0.20 0.1 0.10 0.05 J 0.02 0.01 0.01 R1 R1 J 1 R2 R2 2 1 2 R3 R3 3 C 3 Ci= i/Ri Ci i/Ri 1E-005 0.2469 0.001345 0.1484 0.008469 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc SINGLE PULSE ( THERMAL RESPONSE ) 0.001 1E-006 Ri (C/W) i (sec) 0.1049 0.000099 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Duty Cycle = Single Pulse Avalanche Current (A) 100 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse) 0.01 0.05 0.10 10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C. 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current vs.Pulsewidth 200 EAR , Avalanche Energy (mJ) Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 102A 180 160 140 120 100 80 60 40 20 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav Fig 15. Maximum Avalanche Energy vs. Temperature www.irf.com 5 IRFB/S/SL3207ZPbF 20 IF = 30A V R = 64V 4.0 TJ = 25C TJ = 125C 15 3.5 3.0 IRR (A) VGS(th) , Gate threshold Voltage (V) 4.5 2.5 10 ID = 150A 2.0 ID = 250A 1.5 5 ID = 1.0mA ID = 1.0A 1.0 0 0.5 -75 -50 -25 0 0 25 50 75 100 125 150 175 200 200 600 800 1000 Fig. 17 - Typical Recovery Current vs. dif/dt Fig 16. Threshold Voltage vs. Temperature 20 340 IF = 45A V R = 64V IF = 30A V R = 64V TJ = 25C TJ = 125C TJ = 25C TJ = 125C 260 QRR (A) 15 IRR (A) 400 diF /dt (A/s) T J , Temperature ( C ) 10 5 180 100 0 20 0 200 400 600 800 1000 0 200 diF /dt (A/s) 400 600 800 1000 diF /dt (A/s) Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt 340 IF = 45A V R = 64V TJ = 25C TJ = 125C QRR (A) 260 180 100 20 0 200 400 600 800 1000 diF /dt (A/s) 6 Fig. 20 - Typical Stored Charge vs. dif/dt www.irf.com IRFB/S/SL3207ZPbF D.U.T Driver Gate Drive - - - * D.U.T. ISD Waveform Reverse Recovery Current + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD P.W. Period VGS=10V Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + D= Period P.W. + + - Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Current Inductor Curent ISD Ripple 5% * VGS = 5V for Logic Level Devices Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs V(BR)DSS 15V DRIVER L VDS tp D.U.T RG + V - DD IAS VGS 20V tp A 0.01 I AS Fig 21a. Unclamped Inductive Test Circuit LD Fig 21b. Unclamped Inductive Waveforms VDS VDS 90% + VDD - 10% D.U.T VGS VGS Pulse Width < 1s Duty Factor < 0.1% td(on) Fig 22a. Switching Time Test Circuit tr td(off) tf Fig 22b. Switching Time Waveforms Id Vds Vgs L VCC DUT 0 Vgs(th) 1K Qgs1 Qgs2 Fig 23a. Gate Charge Test Circuit www.irf.com Qgd Qgodr Fig 23b. Gate Charge Waveform 7 IRFB/S/SL3207ZPbF TO-220AB Package Outline (Dimensions are shown in millimeters (inches)) TO-220AB Part Marking Information (;$03/( 7+,6,6$1,5) /27&2'( $66(0%/('21:: ,17+($66(0%/