1 MHz to 4 GHz, 80 dB
Logarithmic Detector/Controller
Preliminary Technical Data ADL5513
Rev. PrA 6/08
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved.
FEATURES
Wide bandwidth: 1 MHz to 4 GHz
80 dB dynamic range (±3 dB)
Stability over temperature: < ±0.5 dB
Low noise measurement/controller output (VOUT)
Pulse response time: 10 ns
Small footprint package: 3 mm x 3 mm LFCSP
Supply operation: 2.7 to 5.5 V at 30 mA
Fabricated using high speed SiGe process
APPLICATIONS
RF transmitter PA setpoint control and level monitoring
Power monitoring in radiolink transmitters
RSSI measurement in base stations, WLAN, WiMAX, radar
FUNCTIONAL BLOCK DIAGRAM
ADL5513
VOUT
VSET
TADJ
GAIN
BIAS
BAND GAP
REFERENCE
SLOPE
CONTROL
VPOS
INHI
INLO
VPOS
IV
V
I
1
12
11
6
9
2
3
4
13
8
5 7
NC
16 15 14
NC
CLPF
NC
NC
DET DET DET DET DET Σ
10
COMM
NC
NC
NC
Figure 1.
GENERAL DESCRIPTION
The ADL5513 is a demodulating logarithmic amplifier, capable
of accurately converting an RF input signal to a corresponding
decibel-scaled output. It employs the progressive compression
technique over a cascaded amplifier chain, each stage of which
is equipped with a detector cell. The device can be used in
either measurement or controller modes. The ADL5513
maintains accurate log conformance for signals greater than 4
GHz. The input dynamic range is typically 80 dB (re: 50 )
with error less than ±3 dB. The ADL5513 has 10 ns response
time which enables RF burst detection to a pulse rate of beyond
50 MHz. The device provides unprecedented logarithmic
intercept stability vs. ambient temperature conditions. A supply
of 2.7 V to 5.5 V is required to power the device. Current
consumption is less than 30 mA, and decreases to TBD A
when the device is disabled.
The ADL5513 can be configured to provide a control voltage to
a power amplifier or a measurement output from the VOUT
pin. Because the output can be used for controller applications,
special attention has been paid to minimize wideband noise. In
this mode, the setpoint control voltage is applied to the VSET
pin.
The feedback loop through an RF amplifier is closed via VOUT,
the output of which regulates the amplifier’s output to a
magnitude corresponding to VSET. The ADL5513 provides 0 V
to (VPOS − 0.1 V) output capability at the VOUT pin, suitable for
controller applications. As a measurement device, VOUT is
externally connected to VSET to produce an output voltage
VOUT that increases linear-in-dB with RF input signal amplitude.
The logarithmic slope is 20 mV/dB, determined by the VSET
interface. The intercept is -95 dBm (re: 50 , CW input, 900
MHz) using the INHI input. These parameters are very stable
against supply and temperature variations.
ADL5513 Preliminary Technical Data
Rev. PrA | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 6
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions ..............................7
Typical Performance Characteristics ..............................................8
Evaluation Board Configuration Options ................................... 10
Outline Dimensions ....................................................................... 12
Ordering Guide ............................................................................... 12
REVISION HISTORY
Preliminary Technical Data ADL5513
Rev. PrA | Page 3 of 12
SPECIFICATIONS
VS = 5 V, T = 25°C, ZO = 50 Ω, Pins INHI, INLO, ac-coupled , Single-ended drive, VOUT tied to VSET, Error referred to best-fit line (linear
regression), unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
OVERALL FUNCTION
Maximum Input Frequency 0.001 4 GHz
100 MHz
Output Voltage: High Power in PIN = -10 dBm, 1.578 V
Output Voltage: Low Power in PIN = -60 dBm 0.589 V
±3.0 dB Dynamic Range CW input, TA = +25°C 75 dB
±1.0 dB Dynamic Range CW input, TA = +25°C 67 dB
±0.5 dB Dynamic Range CW input, TA = +25° 58 dB
Maximum Input Level, ±1.0 dB 9
Minimum Input Level, ±1.0 dB -66
Deviation vs. Temperature Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm ±0.421 dB
-40°C < TA < +85°C; PIN = −30 dBm ±0.467 dB
-40°C < TA < +85°C; PIN = -50 dBm ±0.496 dB
-40°C < TA < +125°C; PIN = -10 dBm ±0.63 dB
-40°C < TA < +125°C; PIN = − 30 dBm ±0.696 dB
-40°C < TA < +125°C; PIN = -50 dBm ±0.0.556 dB
Logarithmic Slope 21 mV/dB
Logarithmic Intercept -88.18 dBm
Input Impedance 1500/TBD Ω/pF
900 MHz
Output Voltage: High Power in PIN = -10 dBm, 1.59 V
Output Voltage: Low Power in PIN = -60 dBm 0.59 V
±3.0 dB Dynamic Range CW input, TA = +25°C 78 dB
±1.0 dB Dynamic Range CW input, TA = +25°C 71 dB
±0.5 dB Dynamic Range CW input, TA = +25° 68 dB
Maximum Input Level, ±1.0 dB 8
Minimum Input Level, ±1.0 dB -68
Deviation vs. Temperature Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm ±0.45 dB
-40°C < TA < +85°C; PIN = −30 dBm ±0.40 dB
-40°C < TA < +85°C; PIN = -50 dBm ±0.515 dB
-40°C < TA < +125°C; PIN = -10 dBm ±0.525 dB
-40°C < TA < +125°C; PIN = − 30 dBm ±0.62 dB
-40°C < TA < +125°C; PIN = -50 dBm ±0.67 dB
Logarithmic Slope 21 mV/dB
Logarithmic Intercept -89.07 dBm
Input Impedance 1500/TBD Ω/pF
ADL5513 Preliminary Technical Data
Rev. PrA | Page 4 of 12
Parameter Conditions Min Typ Max Unit
1900 MHz
Output Voltage: High Power in PIN = -10 dBm 1.61 V
Output Voltage: Low Power in PIN = -60 dBm 0.6 V
±3.0 dB Dynamic Range CW input, TA = +25°C 78 dB
±1.0 dB Dynamic Range CW input, TA = +25°C 71 dB
±0.5 dB Dynamic Range CW input, TA = +25° 68 dB
Maximum Input Level, ±1.0 dB 7
Minimum Input Level, ±1.0 dB -64
Deviation vs. Temperature Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm ±0.46 dB
-40°C < TA < +85°C; PIN = −30 dBm ±0.515 dB
-40°C < TA < +85°C; PIN = -50 dBm ±0.66 dB
-40°C < TA < +125°C; PIN = -10 dBm ±0.41 dB
-40°C < TA < +125°C; PIN = − 30 dBm ±0.73 dB
-40°C < TA < +125°C; PIN = -50 dBm ±0.785 dB
Logarithmic Slope 21 mV/dB
Logarithmic Intercept -89.87 dBm
Input Impedance 1500/TBD Ω/pF
2140 MHz
Output Voltage: High Power in PIN = -10 dBm, 1.61 V
Output Voltage: Low Power in PIN = -60 dBm 0.61 V
±3.0 dB Dynamic Range CW input, TA = +25°C 78 dB
±1.0 dB Dynamic Range CW input, TA = +25°C 70 dB
±0.5 dB Dynamic Range CW input, TA = +25° 66 dB
Maximum Input Level, ±1.0 dB 7
Minimum Input Level, ±1.0 dB -63
Deviation vs. Temperature Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm ±0.43 dB
-40°C < TA < +85°C; PIN = −30 dBm ±0.497 dB
-40°C < TA < +85°C; PIN = -50 dBm ±0.598 dB
-40°C < TA < +125°C; PIN = -10 dBm ±0.635 dB
-40°C < TA < +125°C; PIN = − 30 dBm ±0.727 dB
-40°C < TA < +125°C; PIN = -50 dBm ±0.676 dB
Logarithmic Slope 21 mV/dB
Logarithmic Intercept -90.01 dBm
Input Impedance 1500/TBD Ω/pF
2600 MHz
Output Voltage: High Power in PIN = -10 dBm, 1.62 V
Output Voltage: Low Power in PIN = -60 dBm 0.61 V
±3.0 dB Dynamic Range CW input, TA = +25°C 80 dB
±1.0 dB Dynamic Range CW input, TA = +25°C 74 dB
±0.5 dB Dynamic Range CW input, TA = +25° 72 dB
Maximum Input Level, ±1.0 dB 7
Minimum Input Level, ±1.0 dB -60
Deviation vs. Temperature Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm ±0.47 dB
-40°C < TA < +85°C; PIN = −30 dBm ±0.605 dB
-40°C < TA < +85°C; PIN = -50 dBm ±0.715 dB
-40°C < TA < +125°C; PIN = -10 dBm ±0.575 dB
-40°C < TA < +125°C; PIN = − 30 dBm ±0.8 dB
-40°C < TA < +125°C; PIN = -50 dBm ±0.853 dB
Logarithmic Slope 21 mV/dB
Logarithmic Intercept -90.56 dBm
Input Impedance 1500/TBD Ω/pF
Preliminary Technical Data ADL5513
Rev. PrA | Page 5 of 12
Parameter Conditions Min Typ Max Unit
3.6 GHz
Output Voltage: High Power in PIN = -10 dBm, 1.6 V
Output Voltage: Low Power in PIN = -60 dBm 0.6 V
±3.0 dB Dynamic Range CW input, TA = +25°C 78 dB
±1.0 dB Dynamic Range CW input, TA = +25°C 71 dB
±0.5 dB Dynamic Range CW input, TA = +25° 66 dB
Maximum Input Level, ±1.0 dB 5
Minimum Input Level, ±1.0 dB -66
Deviation vs. Temperature Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm ±0.64 dB
-40°C < TA < +85°C; PIN = −30 dBm ±0.64 dB
-40°C < TA < +85°C; PIN = -50 dBm ±0.62 dB
-40°C < TA < +125°C; PIN = -10 dBm ±0.856 dB
-40°C < TA < +125°C; PIN = − 30 dBm ±0.926 dB
-40°C < TA < +125°C; PIN = -50 dBm ±0.937 dB
Logarithmic Slope 21 mV/dB
Logarithmic Intercept -90.57 dBm
Input Impedance TBD Ω/pF
SETPOINT INPUT Pin VSET
Voltage Range Log conformance error ≤1 dB Min TBD V
Log conformance error ≤1 dB Max TBD
Current Limit Source/Sink 1% change TBD mA
OUTPUT INTERFACE
Rise Time Input level = no signal to −10dBm, 10% to 90% CLPF = 10 pF 10 nS
Fall Time Input level = no signal to −10dBm, 10% to 90% CLPF = 10 pF 20 nS
POWER SUPPLY INTERFACE Pin VPOS
Supply Voltage 2.7 5 5.5 V
Quiescent Current 25C RF in =-55 dBm 30 mA
Supply Current When disabled TBD A
POWER-DOWN INTERFACE Pin PWDN
Logic Level Threshold Logic LO enables Logic HI disables VPOS − 0.7 V V
Enable Time PWDN LO to OUT at 100% final value,
CLPF = 10pF, RF in = −10 dBm
143 ns
Disable Time PWDN HI to OUT at 10% final value,
CLPF = 10pF, RF in = −10 dBm
100 ns
ADL5513 Preliminary Technical Data
Rev. PrA | Page 6 of 12
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage: VPOS 5.5V
VSET Voltage 0 V to VPOS
Input Power (Single-Ended, Re: 50 Ω) TBD dBm
Internal Power Dissipation TBD W
θJA TBD°C/W
Maximum Junction Temperature TBD°C
Operating Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering 60 sec) 260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Preliminary Technical Data ADL5513
Rev. PrA | Page 7 of 12
5
6
7
8
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
VPOS 2
INHI
3
4
INLO
11 VSET
12 VOUT
10 COMM
9TADJ
15 NC
16
14 CLPF
13
PIN 1
INDICATOR
TOP VIEW
(Not to Scale)
ADL5513
VPOS
NC
NC
NC
NC
NC
NC
Figure 2.
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1, 4 VPOS Positive supply Voltage (VPOS), 2.7 V to 5.5 V
2 INHI RF input. AC –coupled RF input.
3 INLO RF common for INHI. AC- coupled RF common.
10 COMM Device Common.
9 TADJ
Temperature Compensation Adjustment. Frequency Dependant Temperature Compensation is set by
connecting a ground referenced resistor to this pin.
11 VSET Setpoint Input for Operation in Controller Mode. To operate in RSSI mode short VSET to VOUT.
12 VOUT Logarithmic/ Error Output.
5, 6, 7, 8, 13,
15, 16
NC No Connect. These pins may be left open or soldered to a low impedance ground plane.
14 CLPF
Loop Filter Capacitor. In measurement mode, this capacitor sets the pulse response time and video
bandwidth.
In controller mode, the capacitance on this node sets the response time of the error amplifier/integrator.
Exposed
Paddle
Internally connected to COMM; solder to a low impedance ground plane.
ADL5513 Preliminary Technical Data
Rev. PrA | Page 8 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
VPOS = 5 V; TA = +25°C, −40°C, +85°C; +125°C, unless otherwise noted. Black: +25°C, Blue: −40°C; Red: +85°C, Orange: +125°C. Error is
calculated by using the best-fit line between PIN = −40 dBm and PIN = −10 dBm at the specified input frequency, unless otherwise noted.
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
VOUT (V)
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Error (dB)
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10
Pin (dBm)
VOUT (V)
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Error (dB)
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10
Pin (dBm)
Figure 3 VOUT and Log Conformance vs. Input Amplitude at 100 MHz,
Multiple Devices, VTADJ = 1.0 V
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
VOUT (V)
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Error (dB)
Figure 6 VOUT and Log Conformance vs. Input Amplitude at 100 MHz,
VTADJ = 1.0 V
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10
Pin (dBm)
VOUT (V)
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Error (dB)
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10
Pin (dBm)
Figure 4 VOUT and Log Conformance vs. Input Amplitude at 900 MHz,
Multiple Devices, VTADJ = 0.975 V
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
VOUT (V)
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Error (dB)
Figure 7 VOUT and Log Conformance vs. Input Amplitude at 900 MHz,
VTADJ = 0.975 V
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10
Pin (dBm)
VOUT (V)
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Error (dB)
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10
Pin (dBm)
Figure 5 VOUT and Log Conformance vs. Input Amplitude at 1900 MHz,
Multiple Devices, VTADJ = 0.925 V
Figure 8. VOUT and Log Conformance vs. Input Amplitude at 1900 MHz,
VTADJ = 0.925 V
Preliminary Technical Data ADL5513
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
VOUT (V)
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Error (dB)
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10
Pin (dBm)
VOUT (V)
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Error (dB)
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10
Pin (dBm)
Figure 9. VOUT and Log Conformance vs. Input Amplitude at 2140 MHz,
Multiple Devices, VTADJ = 0.925 V
Figure 12. VOUT and Log Conformance vs. Input Amplitude at 2140 MHz,
VTADJ = 0.925 V
0.2
0.4
VOUT (V)
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Error (dB)
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10
Pin (dBm)
Figure 10. VOUT and Log Conformance vs. Input Amplitude at 2600 MHz,
Multiple Devices, VTADJ = 0.9 V
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10
Pin (dBm)
VOUT (V)
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Error (dB)
Figure 13. VOUT and Log Conformance vs. Input Amplitude at 2600 MHz,
VTADJ = 0.9 V
0.2
0.4
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10
Pin (dBm)
-3.0
-2.5
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
VOUT (V)
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Error (dB)
Figure 11. VOUT and Log Conformance vs. Input Amplitude at 3600 MHz,
Multiple Devices, VTADJ = 0.9 V
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
VOUT (V)
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Error (dB)
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10
Pin (dBm)
Figure 14. VOUT and Log Conformance vs. Input Amplitude at 3600 MHz,
VTADJ = 0.9 V
Rev. PrA | Page 9
of 12
ADL5513 Preliminary Technical Data
Rev. PrA | Page 10 of 12
EVALUATION BOARD CONFIGURATION OPTIONS
Table 4. Evaluation Board Configuration Options
Component Function Default Value
C1, C2, R1 Input Interface.
The 52.3 Ω resistor in Position R1 combines with the internal input impedance of the
ADL5513 to give a broadband input impedance of about 50 Ω. C1 and C2 are dc-
blocking capacitors. A reactive impedance match can be implemented by replacing
R1 with an inductor and C1 and C2 with appropriately valued capacitors.
R1 = 52.3 Ω (Size 0402)
C1 = 47 nF (Size 0402)
C2 = 47 nF (Size 0402)
C3, C4, C5, C6,
R11, R12
Power Supply Decoupling
The nominal supply decoupling consists of a 100 pF filter capacitor placed physically
close to the ADL5513 and a 0.1 µF capacitor placed nearer to the power supply input
pin. If additional isolation from the power supply is required, a small resistance maybe
installed in between the power supply and the ADL5513. (R11, R12)
C3 = 0.1 µF (Size 0402)
C4 = 100 pF (Size 0402)
C5 = 100 pF (Size 0402)
C6 = 0.1 µF (Size 0402)
R11 = 0 Ω (Size 0402)
R12 = 0 Ω (Size 0402)
C7 Filter Capacitor
The low-pass corner frequency of the circuit that drives the VOUT pin can be lowered
by placing a capacitor between CLPF and ground. Increasing this capacitor increases
the overall rise/fall time of the ADL5513 for pulsed input signals.
C7= 1000 pF (Size 0402)
R2, R3 R4, R5, R10,
RL, CL
Output Interface—Measurement Mode.
In measurement mode, a portion of the output voltage is fed back to the VSET pin via R4.
The magnitude of the slope of the VOUT output voltage response can be increased by
reducing the portion of VOUT that is fed back to VSET. R3 can be used as a back-
terminating resistor or as part of a single-pole, low-pass filter.
R2 = open (Size 0402)
R3 = 1 kΩ (Size 0402)
R4 = 0 Ω (Size 0402)
R5 = open (Size 0402)
R10 = open (Size 0402)
RL = CL = open (Size 0402)
R4, R5, R10 Output Interface—Controller Mode.
In this mode, R4 must be open. In controller mode, the ADL5513 can control the gain of
an external component. A setpoint voltage is applied to Pin VSET, the value of which
corresponds to the desired RF input signal level applied to the ADL5513 RF input. A
sample of the RF output signal from this variable gain component is selected, typically
via a directional coupler, and applied to ADL5513 RF input. The voltage at the VOUT
pin is applied to the gain control of the variable gain element. A control voltage is
applied to the VSET pin. The magnitude of the control voltage can optionally be
attenuated via the voltage divider comprising R4 and R5, or a capacitor can be
installed in Position R5 to form a low-pass filter along with R4.
R4 = open (Size 0402)
R5 = open (Size 0402)
R10 = 0 Ω (Size 0402)
R6, R7, R8, R9 Temperature Compensation Interface.
A voltage source can be used to optimize the temperature performance for various
input frequencies. The pads for R8/R9 can be used for a voltage divider from the VPOS
node to set the TADJ voltage at different frequencies. The ADL5513 may be disabled by
by applying a voltage of VPOS −0.7 V to this node.
R6 = open (Size 0402)
R7= 0 Ω (Size 0402)
R8 = open (Size 0402)
R9 = open Ω (Size 0402)
VPOS, GND Supply and Ground Connections Not Applicable
Preliminary Technical Data ADL5513
Rev. PrA | Page 11 of 12
Z1
V
POS GND
VSET
V
OUT
VOUT_ALT
R4
R2
R3
CL RL
open
1 k
open open
0 ohms
EXT_ PWDN - TADJ
RFIN
C2
47nF
ADL5513
1
2
3
4
11
12
10
9
5
6
7
813
14
15
16
C6
0.1 uF
C5
100 pF
R1
C7
1000 pF
VPOS
C3
0.1 uF
C4
100 pF
VPOS
VPOS
INHI
INLO
VOUT
VSET
COMM`
TADJ
NC
NC
NC
CLPF
C1
47nF
R5
open
TADJ
VPOS
TADJ
R6
R7
R8
R9
open
open
open
0 ohms
VPOS
R12
0 ohms
0 ohms
R11
R10
0 ohms
52.3 ohms
NC
NC
NC
NC
Figure 15. Evaluation Board Schematic
Figure 16.Component Side Layout
Figure 17. Component Side Silkscreen
ADL5513 Preliminary Technical Data
Rev. PrA | Page 12 of 12
a
16-L ead Lead Frame Ch ip Scale Package [LFCSP_VQ ]
3 x 3 mm Body, Very Thin Quad
(CP-16-3)
Dimensions shown in millimeters
OUTLINE DIMENSIONS
1
0.50
BSC
0.60 M A X
PIN 1
INDICATOR
1.50 REF
0.50
0.40
0.30
0.25 MI N
0.45
2.75
BSC SQ
TOP
VIEW
12° M AX 0.80 M A X
0.65 TYP
SEATING
PLANE
PIN 1
INDICATOR
3.00
BSC SQ
0.90
0.85
0.80
0.30
0.23
0.18
0.05 MA X
0.02 NO M
0.20 RE F
*1.65
1.50 S Q
1.35
16
5
13
8
9
12
4
EXPOSED
PAD
(BOTTO M VIEW)
*COMPLIANT
TO
JEDEC STANDARDS MO-220- VEED-2
EXCEPT FOR EXPOSED PAD DIMENSION.
Figure 18. -Lead Lead Frame Chip Scale Package [LFCSP_VQ]
3 mm × 3 mm Body, Very Thin, Dual Lead
(CP-16-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
ADL5513-ACPZ-R71
−40°C to +125°C 16-Lead LFCSP_VQ, Reel CP-16-3 TBD
ADL5513-ACPZ-R21
−40°C to +125°C 16-Lead LFCSP_VQ, Reel CP-16-3 TBD
ADL5513-ACPZ-WP12
−40°C to +125°C 16-Lead LFCSP_VQ, Waffle Pack CP-16-3 TBD
ADL5513-EVALZ1
Evaluation Board
1 Z = RoHS Compliant Part.
2 WP = waffle pack
© 2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
PR07514-0-6/08(PrA)
