03/09/11
www.irf.com 1
HEXFET® Power MOSFET
Benefits
lImproved Gate, Avalanche and Dynamic dV/dt
Ruggedness
lFully Characterized Capacitance and Avalanche
SOA
lEnhanced body diode dV/dt and dI/dt Capability
l Lead-Free
Applications
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
GDS
Gate Drain Source
IRFS4115PbF
IRFSL4115PbF
S
D
G
D
D
S
G
D2Pak
IRFS4115PbF
TO-262
IRFSL4115PbF
V
DSS
150V
R
DS(on)
typ.
10.3m
:
max. 12.1m
:
ID (Silicon Limited) 99A
c
ID (Package Limited) 195A
S
D
G
Absolute Maximum Ratings
Parameter
Units
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
I
D
@ T
C
= 100°C
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V (Wire Bond Limited)
I
DM
Pulsed Drain Current
d
P
D
@T
C
= 25°C
Maximum Power Dissipation W
Linear Derating Factor W/°C
V
GS
Gate-to-Source Voltage V
dv/dt Peak Diode Recovery
f
V/ns
T
J
Operating Junction and
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
E
AS (Thermally limited)
Single Pulse Avalanche Energy
e
mJ
I
AR
Avalanche Current
d
A
E
AR
Repetitive Avalanche Energy
g
mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
R
θJC
Junction-to-Case
kl
––– 0.4
R
θJA
Junction-to-Ambient
jk
––– 40 °C/W
A
°C
300
830
See Fig. 14, 15, 22a, 22b,
375
18
Max.
99
c
70
c
396
195
-55 to + 175
± 20
2.5
10lb
x
in (1.1N
x
m)
PD - 96198A
IRFS/SL4115PbF
2www.irf.com
S
D
G
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Recommended max EAS limit, starting TJ = 25°C,
L = 0.17mH, RG = 25Ω, IAS = 100A, VGS =15V.
ISD ≤ 62A, di/dt ≤ 1040A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
RθJC value shown is at time zero.
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Typ.
Max.
Units
V(BR)DSS Drain-to-Source Breakdown Voltage 150 ––– ––– V
ΔV
(BR)DSS
/ΔT
J
Breakdown Voltage Temp. Coefficient ––– 0.18 ––– V/°C
RDS(on) Static Drain-to-Source On-Resistance ––– 10.3 12.1 mΩ
VGS(th) Gate Threshold Voltage 3.0 ––– 5.0 V
IDSS Drain-to-Source Leakage Current ––– ––– 20 μA
––– ––– 250
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA
Gate-to-Source Reverse Leakage ––– ––– -100
RGInternal Gate Resistance ––– 2.3 –––
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
gfs Forward Transconductance 97 ––– ––– S
QgTotal Gate Charge ––– 77 120 nC
Qgs Gate-to-Source Charge ––– 28 –––
Qgd Gate-to-Drain ("Miller") Charge ––– 26 –––
Qsync Total Gate Charge Sync. (Qg - Qgd)––– 51 –––
td(on) Turn-On Delay Time ––– 18 ––– ns
trRise Time ––– 73 –––
td(off) Turn-Off Delay Time ––– 41 –––
tfFall Time ––– 39 –––
Ciss Input Capacitance ––– 5270 ––– pF
Coss Output Capacitance ––– 490 –––
Crss Reverse Transfer Capacitance ––– 105 –––
Coss eff. (ER)
Effective Output Capacitance (Energy Related)
––– 460 –––
Coss eff. (TR) Effective Output Capacitance (Time Related) ––– 530 –––
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units
ISContinuous Source Current ––– ––– 99 A
(Body Diode)
ISM Pulsed Source Current ––– ––– 396 A
(Body Diode)
d
VSD Diode Forward Voltage ––– ––– 1.3 V
trr Reverse Recovery Time ––– 86 ––– ns TJ = 25°C VR = 130V,
––– 110 ––– TJ = 125°C IF = 62A
Qrr Reverse Recovery Charge ––– 300 ––– nC TJ = 25°C di/dt = 100A/μs
g
––– 450 ––– TJ = 125°C
IRRM Reverse Recovery Current ––– 6.5 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Conditions
VDS = 50V, ID = 62A
ID = 62A
VGS = 20V
VGS = -20V
MOSFET symbol
showing the
VDS = 75V
Conditions
VGS = 10V
g
VGS = 0V
VDS = 50V
ƒ = 1.0 MHz, See Fig. 5
VGS = 0V, VDS = 0V to 120V
i
, See Fig. 11
VGS = 0V, VDS = 0V to 120V
h
TJ = 25°C, IS = 62A, VGS = 0V
g
integral reverse
p-n junction diode.
Conditions
VGS = 0V, ID = 250μA
Reference to 25°C, ID = 3.5mA
d
VGS = 10V, ID = 62A
g
VDS = VGS, ID = 250μA
VDS = 150V, VGS = 0V
VDS = 150V, VGS = 0V, TJ = 125°C
ID = 62A
RG = 2.2Ω
VGS = 10V
g
VDD = 98V
ID = 62A, VDS =0V, VGS = 10V
IRFS/SL4115PbF
www.irf.com 3
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature
Fig 2. Typical Output Characteristics
Fig 6. Typical Gate Charge vs. Gate-to-Source VoltageFig 5. Typical Capacitance vs. Drain-to-Source Voltage
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
BOTTOM 5.0V
≤60μs PULSE WIDTH
Tj = 25°C
5.0V
110 100 1000
VDS, Drain-to-Source Voltage (V)
10
100
1000
10000
100000
C, Capacitance (pF)
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
Coss
Crss
Ciss
2 4 6 8 10 12 14 16
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
VDS = 50V
≤60μs PULSE WIDTH
0 20406080100
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
VGS, Gate-to-Source Voltage (V)
VDS= 120V
VDS= 75V
VDS= 30V
ID= 62A
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
5.0V
≤60μs PULSE WIDTH
Tj = 175°C
VGS
TOP 15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
BOTTOM 5.0V
-60 -40 -20 020 40 60 80 100120140160180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 62A
VGS = 10V
IRFS/SL4115PbF
4www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 10. Drain-to-Source Breakdown Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 11. Typical COSS Stored Energy
Fig 9. Maximum Drain Current vs.
Case Temperature
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
-60 -40 -20 020 40 60 80 100120140160180
TJ , Temperature ( °C )
140
150
160
170
180
190
200
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
Id = 3.5mA
-20 0 20 40 60 80 100 120 140 160
VDS, Drain-to-Source Voltage (V)
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Energy (μJ)
1 10 100 1000
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
Tc = 25°C
Tj = 175°C
Single Pulse
100μsec
1msec
10msec
DC
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
20
40
60
80
100
120
ID, Drain Current (A)
Fig 12. Threshold Voltage vs. Temperature
-75 -50 -25 025 50 75 100 125 150 175
TJ , Temperature ( °C )
1.0
2.0
3.0
4.0
5.0
6.0
VGS(th), Gate threshold Voltage (V)
ID = 250μA
ID = 1.0mA
ID = 1.0A
IRFS/SL4115PbF
www.irf.com 5
Fig. 13 Maximum Effective Transient Thermal Impedance, Junction-to-Case
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.0001
0.001
0.01
0.1
1
Thermal Response ( Z thJC ) °C/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Ri (°C/W) τi (sec)
0.245 0.0059149
0.155 0.0006322
τJ
τ
J
τ1
τ1τ2
τ
2
R1
R1R2
R2
τ
C
τC
Ci = τi/Ri
Ci= τi/Ri
Fig. 14 - Typical Recovery Current vs. dif/dt
0200 400 600 800 1000
diF /dt (A/μs)
0
10
20
30
40
50
IRR (A)
IF = 42A
VR = 130V
TJ = 25°C
TJ = 125°C
Fig. 15 - Typical Recovery Current vs. dif/dt
0200 400 600 800 1000
diF /dt (A/μs)
0
10
20
30
40
50
IRR (A)
IF = 62A
VR = 130V
TJ = 25°C
TJ = 125°C
Fig. 16 - Typical Stored Charge vs. dif/dt
0200 400 600 800 1000
diF /dt (A/μs)
0
500
1000
1500
2000
2500
QRR (A)
IF = 42A
VR = 130V
TJ = 25°C
TJ = 125°C
Fig. 17 - Typical Stored Charge vs. dif/dt
0200 400 600 800 1000
diF /dt (A/μs)
0
600
1200
1800
2400
3000
QRR (A)
IF = 62A
VR = 130V
TJ = 25°C
TJ = 125°C
IRFS/SL4115PbF
6www.irf.com
Fig 20a. Switching Time Test Circuit Fig 20b. Switching Time Waveforms
Fig 19b. Unclamped Inductive Waveforms
Fig 19a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
Fig 21a. Gate Charge Test Circuit Fig 21b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 18. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
Inductor Current
D.U.T. VDS
ID
IG
3mA
VGS
.3μF
50KΩ
.2μF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
VGS
IRFS/SL4115PbF
www.irf.com 7
D2Pak (TO-263AB) Part Marking Information
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
'$7(&2'(
<($5 
:((.
$ $66(0%/<6,7(&2'(
5(&7,),(5
,17(51$7,21$/ 3$57180%(5
3 '(6,*1$7(6/($')5((
352'8&7237,21$/
)6
,17+($66(0%/</,1(/
$66(0%/('21::
7+,6,6$1,5)6:,7+
/27&2'( ,17(51$7,21$/
/2*2
5(&7,),(5
/27&2'(
$66(0%/< <($5
3$57180%(5
'$7(&2'(
/,1(/
:((.
25
)6
/2*2
$66(0%/<
/27&2'(
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
IRFS/SL4115PbF
8www.irf.com
TO-262 Part Marking Information
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
/2*2
5(&7,),(5
,17(51$7,21$/
/27&2'(
$66(0%/<
/2*2
5(&7,),(5
,17(51$7,21$/
'$7(&2'(
:((.
<($5
3$57180%(5
$ $66(0%/<6,7(&2'(
25
352'8&7237,21$/
3 '(6,*1$7(6/($')5((
(;$03/( 7+,6,6$1,5//
/27&2'(
$66(0%/<
3$57180%(5
'$7(&2'(
:((.
/,1(&
/27&2'(
<($5
$66(0%/('21::
,17+($66(0%/</,1(&
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
IRFS/SL4115PbF
www.irf.com 9
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 03/2011
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/