1www.semtech.com
Revision 1/March 1, 2001
HIGH-PERFORMANCE PRODUCTS PRELIMINARY
Extended Supply Voltage Range: (VEE = –5.5V to
–3.0V, VCC = 0V) or (VCC = +3.0V to +5.5V, VEE =
0V)
High Bandwidth Output Transitions
300 ps Propagation Delay
VBB Output
Internal Input Resistors: Pulldown on D, Pulldown
and Pullup on D*
•Q
HG Output will Default Low with Inputs Open or
at VEE
New Differential Input Common Mode Range
Functionally Equivalent to MC10/100EL16 and
MC100LVEL16
ESD Protection of >4000V
Specified Over Industrial Temperature Range:
–40oC to 85oC
Available in Both 8 and 16 Pin SOIC Packages,
and 8 and 10 Pin MSOP Packages
SK10/100EL16XWA-XWG
High Gain Differential Receiver
Description Features
Pin Configurations
Pin Names
niPnoitcnuF
*D,DstupnIataDlaitnereffiD
*Q,QstuptuOataDlaitnereffiD
Q
GH
Q,
GH
*stuptuOataDniaGhgiHlaitnereffiD
V
BB
egatloVtuptuOecnerefeR
*NEtupnIelbanE
1
2
3
4
8
7
6
5
NC
D
D*
VBB
VCC
QHG
QHG*
VEE
Pin Configuration
SK10/100EL16XWA
(Available in 8-Pin SOIC & MSOP Packages)
The SK10/100EL16XWA-XWG devices are high gain
differential receivers with higher performance capabilities.
These devices have a DC gain of approximately 200. SK10/
100EL16XWA-XWG devices are functionally compatible
with SK10/100EL16W and MC10/100EL16 and
MC10/100LVEL16 as well.
SK10/100EL16XWA is pin to pin compatible with
SK10/100EL16W with the exception of its high gain
differential outputs.
SK10/100EL16XWB is pin to pin compatible with
SK10/100EL16B with the exception of its differential
high gain outputs.
SK10/100EL16XWC is for single ended mode of
operation since its D* input is internally connected to
the reference voltage VBB; therefore, pin 3 should be
bypassed to VCC via 0.01 uF capacitor. This device
has differential high gain outputs, an added feature
of the enable input pin, and the single ended monitor
output Q* similar to SK10/100EL16XWB.
SK10/100EL16XWD has all the options: the
differential monitor outputs and the high gain outputs,
enable-input pin, and the VBB reference voltage.
SK10/100EL16XWE has only the differential monitor
outputs and the high gain outputs.
SK10/100EL16XWF had the enable option, the single
ended monitor output and the differential high gain
outputs.
SK10/100EL16XWG is pin to pin compatible with
SK10/100EL16V with the exception of its differential
high gain outputs. Its VCTRL input controls the
amplitude of the QHG and QHG* outputs. The
operating range of the EL16XWG control input,
VCTRL, is from VBB (large swing) to VCC (min swing),
see Figure 3. Simple control of the output swing
can be obtained by a variable resistor between
the VBB and VCC pins, with wiper driving CTRL.
Typical application circuits and results are
described in Figures 3, 4a, and 4b.
If provided, VBB reference voltage is an output pin for
single-ended use or DC bias for AC coupling to the device.
Whenever used, VBB output pin should be bypassed to
VCC via a 0.01 uF capacitor.
Under open input conditions, the pull-down resistor on
D, pull-down and pull-up on D* will force the high gain
outputs QHG to a low state and QHG* to a high state.
2www.semtech.com
HIGH-PERFORMANCE PRODUCTS
SK10/100EL16XWA-XWG
Revision 1/March 1, 2001
PRELIMINARY
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Q
NC NC
NC
NC NC
NC
Q*
D
D*
VCC
QHG
QHG*
VEE
EN*
VBB
OE
Q
D
LEN
LATCH
1
2
3
4
8
7
6
5
Q*
D
VBB
EN*
VCC
QHG
QHG*
VEE
OE
Q
D
LEN
LATCH
SK10/100EL16XWB
(Available in 8-Pin SOIC & MSOP Packages)
1
2
3
4
8
7
6
5
Q*
D
D*
VBB
VCC
QHG
QHG*
VEE
SK10/100EL16XWD
(Available in 16-Pin SOIC and 10-Pin MSOP Packages)
SK10/100EL16XWC
(Available in 8-Pin SOIC & MSOP Packages)
2
3
4
5
9
1 10
8
7
6
Q*
Q
D
VBB
VCC
QHG
QHG*
VEE
EN*
OE
Q
D
LEN
LATCH
D*
Pin Configuration
3www.semtech.com
HIGH-PERFORMANCE PRODUCTS
SK10/100EL16XWA-XWG
Revision 1/March 1, 2001
PRELIMINARY
Pin Configuration (continued)
1
2
3
4
8
7
6
5
Q*
D
D*
EN*
VCC
QHG
QHG*
VEE
OE
Q
D
LEN
LATCH
1
2
3
4
8
7
6
5
D
D*
VBB
VCTRL
VCC
QHG
QHG*
VEE
1
2
3
4
8
7
6
5
Q
Q*
D
D*
VCC
QHG
QHG*
VEE
SK10/100EL16XWE
(Available in 8-Pin SOIC & MSOP Packages)
SK10/100EL16XWF
(Available in 8-Pin SOIC & MSOP Packages)
SK10/100EL16XWG
(Available in 8-Pin SOIC & MSOP Packages)
4www.semtech.com
HIGH-PERFORMANCE PRODUCTS
SK10/100EL16XWA-XWG
Revision 1/March 1, 2001
PRELIMINARY
END VIEW
h x 45o
C
q
L
TOP VIEW
85
1
4
D
EH
e
B
A
0.25 M B M
B
C
A1
A
0.25 M C B S A S
0.10
Seating
Plane
8 Pin SOIC Package
NOTES:
1. Dimensions are in millimeters.
2. Dimensions D and E do no include mold protrusion.
3. Maximum mold protrusion 0.15 per side.
4. Dimension B does not include Dambar protrusion.
Allowable Dambar protrusion shall be 0.127 total
in excess of the B dimension at maximum material
condition.
SRETEMILLIM
MID NIM XAM
A53.157.1
1A01.052.0
B33.015.0
C91.052.0
D08.400.5
E08.300.4
e72.1CSB
H08.502.6
h52.005.0
L04.072.1
θ0
o
8
o
Package Information
5www.semtech.com
HIGH-PERFORMANCE PRODUCTS
SK10/100EL16XWA-XWG
Revision 1/March 1, 2001
PRELIMINARY
MIDNIMXAMNIMXAM
A08.900.01683.0393.0
B08.300.4051.0751.0
C53.157.1450.0860.0
D53.094.0410.0910.0
F04.052.1610.0940.0
G72.1CSB050.0CSB
J91.052.0800.0900.0
K01.052.0400.0900.0
M0
o
7
o
0
o
7
o
P08.502.6922.0442.0
R52.005.0010.0910.0
16 Pin SOIC Package
J
F
R
x 45
˚
M
D
C
K
T
16 PL
SEATING
PLANE
0.25 (0.010) M T B S A S
G
A
P
B8 PL
0.25 (0.010) M B S
16 9
18
NOTES:
1. Dimensions and tolerances per ANSI Y14.5M, 1982.
2. Controlling dimension: millimeter.
3. Dimensions A and B do not include mold protrusion.
4. Maximum mold protrusion 0.150 (0.006) per side.
5. Dimension D does not include Dambar protrusion.
Allowable Dambar protrusion shall be 0.13 (0.005)
total in excess of d dimension at maximum material
condition.
Millimeters Inches
Package Information (continued)
6www.semtech.com
HIGH-PERFORMANCE PRODUCTS
SK10/100EL16XWA-XWG
Revision 1/March 1, 2001
PRELIMINARY
NOTES:
1. Dimensions are in mm.
2. Controlling dimension: mm
3. Dimension does not include mold flash or
protrusions, either of which shall not
exceed 0.20.
8 Pin MSOP Package
MIDNIMXAM
A49.01.1
B12.054.0
C31.022.0
D09.201.3
E09.201.3
e56.0CSB
H7.41.5
L4.07.0
θ0
o
6
o
5
4
8
1
TOP VIEW BOTTOM VIEW
END VIEW DETAIL A
See Detail A
HE
B e
D
A
C
L
θ
Millimeters
Package Information (continued)
7www.semtech.com
HIGH-PERFORMANCE PRODUCTS
SK10/100EL16XWA-XWG
Revision 1/March 1, 2001
PRELIMINARY
10 Pin MSOP Package
6
5
10
1
TOP VIEW BOTTOM VIEW
END VIEW DETAIL A
See Detail A
HE
B e
D
A
C
L
q
NOTES:
1. Dimensions are in mm [inches].
2. Controlling dimension: mm
3. Dimension does not include mold flash or
protrusions, either of which shall not
exceed 0.20 [0.008].
MIDNIMXAMNIMXAM
A49.01.1730.0340.0
B51.03.0600.0210.0
C1.062.0400.0100.0
D58.251.3411.0221.0
E9.21.3411.0221.0
e5.0CSB20.0CSB
H9.4CSB391.0CSB
L04.07.0610.820.0
θ0
o
3
o
0
o
3
o
mm Inches
Package Information (continued)
8www.semtech.com
HIGH-PERFORMANCE PRODUCTS
SK10/100EL16XWA-XWG
Revision 1/March 1, 2001
PRELIMINARY
(VCC – VEE = 3.0V to 5.5V; VOUT loaded 50
to VCC – 2.0V)
lobmyScitsiretcarahCniMxaMniMxaMniMxaMniMxaMtinU
IEE tnerruCylppuSrewoP
LE01
LE001
82
13
04
74
82
13
04
74
82
13
04
74
82
13
04
74
Am
Am
VBB egatloVecnerefeRtuptuO 5
LE01
LE001
34.1-
83.1-
03.1-
62.1-
83.1-
83.1-
72.1-
62.1-
53.1-
83.1-
52.1-
62.1-
13.1-
83.1-
91.1-
62.1-
V
V
VCC VEE egnaRegatloVylppuS0.35.50.35.50.35.50.35.5V
INI )ffiD(tnerruCtupnI
)ES(
051-051
051
051-051
051
051-051
051
051-051
051
Aµ
Aµ
SK10/100EL16XWA-XWG DC Electrical Characteristics (Notes 1, 2)
TA = –40oC TA = 0oC TA = +25oC TA = +85oC
DC Characteristics
9www.semtech.com
HIGH-PERFORMANCE PRODUCTS
SK10/100EL16XWA-XWG
Revision 1/March 1, 2001
PRELIMINARY
lobmyScitsiretcarahCniMpyTxaMniMpyTxaMniMpyTxaMniMpyTxaMtinU
f
xam
elggoTmumixaM
ycneuqerF
4
ataDZRN
KLC
5.2
52.1
5.2
52.1
5.2
52.1
5.2
52.1
spbG
zHG
t
HLP
t
LHP
yaleDtuptuOottupnI
)FFID(tuptuO*Q,Q 582563003073503573013504sp
t
HLP
t
LHP
yaleDtuptuOottupnI
Q
GH
Q,
GH
tuptuO*
)FFID( 082533092545592553013073sp
t
S
emiTputeS
*NE 051051051051sp
t
H
emiTdloH
*NE 051051051051sp
wekstwekSelcyCytuD
3
)FFID( 5502502502sp
t
r
t,
f
semiTllaF/esiRtuptuO
)%08ot%02(*Q,Q
Q
GH
,Q
GH
)%08-%02(*
071
021
582
091
571
031
092
091
081
031
592
591
091
031
013
502
sp
sp
V
RMC
egnaRedoMnommioC
7
V
EE
+
7.1 CCV V
EE
+
7.1 CCV V
EE
+
7.1 CCV V
EE
+
7.1 CCVV
V
PP
gniwStupnIlaitnereffiD
6
051000105100010510001051000105100010510001Vm
OV
P-P
egatloVtuptuO
9,8
001001001001Vm
(VCC – VEE = 3.0V to 5.5V; VOUT loaded 50
to VCC – 2.0V)
SK10/100EL16XWA-XWG AC Electrical Characteristics
Notes:
1. 10K circuits are designed to meet the DC specification shown in the table after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board, and transverse airflow greater than
500 lfpm is maintained.
2. 100K circuits are designed to meet the DC specification shown in the table where transverse airflow greater
than 500 lfpm is maintained.
3. Duty cycle skew is the difference between TPLH and TPHL propagation delay through a device.
4. FMAX guaranteed for functionality only. See Figure 1 for typical output swing.
5. Voltages referenced to VCC = 0V.
6. Minimum input swing for which AC parameters are guaranteed. The device has a DC gain of 40 to Q/Q*
outputs and a DC gain of 200 or higher to QHG/QHG* outputs.
7. CMR range is referenced to the most positive side of the differential input signal. Normal operation is
obtained if the high level falls within the specified range and the peak-to-peak voltage lies between
VPP(min) and 1V. The lower end of the CMR range varies 1:1 with VEE and is equal to VEE + 1.7V.
8. VOP-P is obtained as follows: Voltages of Q and Q* outputs with respect to VCC are measured. The
absolute difference between a high and a low state is equal to VOP-P.
9. The output voltage applies to EL16XWG only. VCTRL = VCC.
10. For standard ECL DC specifications, refer to the ECL Logic Family Standard DC Specifications Data
Sheet.
11. For part ordering description, see HPP Part Ordering Information Data Sheet.
TA = –40oC TA = 0oC TA = +25oC TA = +85oC
AC Characteristics
10 www.semtech.com
HIGH-PERFORMANCE PRODUCTS
SK10/100EL16XWA-XWG
Revision 1/March 1, 2001
PRELIMINARY
D
EN*
Q
QHG
Input Conditions: 20mV
Output VPP: 700 mV @ 700 MHz
550 mV @ 1.25 GHz - 2.5 Gbps NRZ Data
Figure 1. Typical Output VPP vs. Frequency
Figure 2. Timing Diagram
Typical Output VPP vs. Frequency
300
400
500
600
700
800
900
200 400 600 800 1000 1200 1400 1600
Output Frequency (MHz)
Output VPP Amplitude (mV)
AC Characteristics (continued)
11 www.semtech.com
HIGH-PERFORMANCE PRODUCTS
SK10/100EL16XWA-XWG
Revision 1/March 1, 2001
PRELIMINARY
100
75
50
25
0VEE VCC
1.32 V
CC
0.8 V
CC
0.4 V
CC
VCTRL
= Open
Voltage Control (V)
Voltage Swing (% pk-pk differential)
1
2
3
4
8
7
6
5
VCTRL
VBB
VCC
D
D*
VCC
VSWING
(pk-pk)
GND
QHG
QHG*
+
R1 R2
1
2
3
4
8
7
6
5
VCTRL
VBB
VCC
D
D*
VCC
VSWING
(pk-pk)
GND
QHG
QHG*
R1 R2
10K
Note: R1 = R2 150
for VCC = 3.3V
R1 = R2 330
for VCC = 5.0V Note: R1 = R2 150
for VCC = 3.3V
R1 = R2 330
for VCC = 5.0V
Implementation of Voltage Source
Figure 4B
Figure 4A
Figure 3. Typical Voltage Output Swing at 25oC
AC Characteristics (continued)
12 www.semtech.com
HIGH-PERFORMANCE PRODUCTS
SK10/100EL16XWA-XWG
Revision 1/March 1, 2001
PRELIMINARY
edoCgniredrODIegakcaPegnaRerutarepmeT
DAWX61LE01KSCIOS-8lairtsudnI
DBWX61LE01KSCIOS-8lairtsudnI
DCWX61LE01KSCIOS-8lairtsudnI
DDWX61LE01KSCIOS-61lairtsudnI
DEWX61LE01KSCIOS-8lairtsudnI
DFWX61LE01KSCIOS-8lairtsudnI
DGWX61LE01KSCIOS-8lairtsudnI
TDAWX61LE01KSCIOS-8lairtsudnI
TDBWX61LE01KSCIOS-8lairtsudnI
TDCWX61LE01KSCIOS-8lairtsudnI
TDDWX61LE01KSCIOS-61lairtsudnI
TDEWX61LE01KSCIOS-8lairtsudnI
TDFWX61LE01KSCIOS-8lairtsudnI
TDGWX61LE01KSCIOS-8lairtsudnI
SMAWX61LE01KSPOSM-8lairtsudnI
SMBWX61LE01KSPOSM-8lairtsudnI
SMCWX61LE01KSPOSM-8lairtsudnI
SMDWX61LE01KSPOSM-01lairtsudnI
SMEWX61LE01KSPOSM-8lairtsudnI
SMFWX61LE01KSPOSM-8lairtsudnI
SMGWX61LE01KSPOSM-8lairtsudnI
TSMAWX61LE01KSPOSM-8lairtsudnI
TSMBWX61LE01KSPOSM-8lairtsudnI
TSMCWX61LE01KSPOSM-8lairtsudnI
TSMDWX61LE01KSPOSM-01lairtsudnI
TSMEWX61LE01KSPOSM-8lairtsudnI
TSMFWX61LE01KSPOSM-8lairtsudnI
TSMGWX61LE01KSPOSM-8lairtsudnI
Ordering Information
13 www.semtech.com
HIGH-PERFORMANCE PRODUCTS
SK10/100EL16XWA-XWG
Revision 1/March 1, 2001
PRELIMINARY
edoCgniredrODIegakcaPegnaRerutarepmeT
DAWX61LE001KSCIOS-8lairtsudnI
DBWX61LE001KSCIOS-8lairtsudnI
DCWX61LE001KSCIOS-8lairtsudnI
DDWX61LE001KSCIOS-61lairtsudnI
DEWX61LE001KSCIOS-8lairtsudnI
DFWX61LE001KSCIOS-8lairtsudnI
DGWX61LE001KSCIOS-8lairtsudnI
TDAWX61LE001KSCIOS-8lairtsudnI
TDBWX61LE001KSCIOS-8lairtsudnI
TDCWX61LE001KSCIOS-8lairtsudnI
TDDWX61LE001KSCIOS-61lairtsudnI
TDEWX61LE001KSCIOS-8lairtsudnI
TDFWX61LE001KSCIOS-8lairtsudnI
TDGWX61LE001KSCIOS-8lairtsudnI
SMAWX61LE001KSPOSM-8lairtsudnI
SMBWX61LE001KSPOSM-8lairtsudnI
SMCWX61LE001KSPOSM-8lairtsudnI
SMDWX61LE001KSPOSM-01lairtsudnI
SMEWX61LE001KSPOSM-8lairtsudnI
SMFWX61LE001KSPOSM-8lairtsudnI
SMGWX61LE001KSPOSM-8lairtsudnI
TSMAWX61LE001KSPOSM-8lairtsudnI
TSMBWX61LE001KSPOSM-8lairtsudnI
TSMCWX61LE001KSPOSM-8lairtsudnI
TSMDWX61LE001KSPOSM-01lairtsudnI
TSMEWX61LE001KSPOSM-8lairtsudnI
TSMFWX61LE001KSPOSM-8lairtsudnI
TSMGWX61LE001KSPOSM-8lairtsudnI
UWX61LE01KSeiDG-AsnoitpO
UWX61LE001KSeiDG-AsnoitpO
Ordering Information (continued)
14 www.semtech.com
HIGH-PERFORMANCE PRODUCTS
SK10/100EL16XWA-XWG
Revision 1/March 1, 2001
PRELIMINARY
Function / Voltage Option
Function Code / Part Number
Assembly Lot Number
Assembly Date Code
SK10EL/ELT = H
SK100EL/ELT = K
8/10 PIN MSOP PACKAGES
Function / Voltage &
Device Operation
Function Code / Part Number
H = 10
K = 100
YY: Last two digits of the Year
WW: Working Week
EL
WW
YY
8 PIN SOIC PACKAGE
Assembly
Lot Number
Because there are too many characters in the
ordering code, and the fact that the MSOP
Package can only accomodate four characters per
row, the example below depicts the naming
convention adopted for these parts only:
1: H16XA ------>SK10EL16XWAMS
2: K16XA ------>SK100EL16XWAMS
Marking Example for MSOP Package
Division Headquarters
10021 Willow Creek Road
San Diego, CA 92131
Phone: (858) 695-1808
FAX: (858) 695-2633
Marketing Group
1111 Comstock Street
Santa Clara, CA 95054
Phone: (408) 566-8776
FAX: (408) 727-8994
Semtech Corporation
High-Performance Products Division
Contact Information
Marking Information